asm/txx9/tx3927.h

11 #define TX3927_REG_BASE 0xfffe0000UL
12 #define TX3927_REG_SIZE 0x00010000
13 #define TX3927_SDRAMC_REG	(TX3927_REG_BASE + 0x8000)
14 #define TX3927_ROMC_REG		(TX3927_REG_BASE + 0x9000)
15 #define TX3927_DMA_REG		(TX3927_REG_BASE + 0xb000)
16 #define TX3927_IRC_REG		(TX3927_REG_BASE + 0xc000)
17 #define TX3927_PCIC_REG		(TX3927_REG_BASE + 0xd000)
18 #define TX3927_CCFG_REG		(TX3927_REG_BASE + 0xe000)
20 #define TX3927_TMR_REG(ch)	(TX3927_REG_BASE + 0xf000 + (ch) * 0x100)
22 #define TX3927_SIO_REG(ch)	(TX3927_REG_BASE + 0xf300 + (ch) * 0x100)
23 #define TX3927_PIO_REG		(TX3927_REG_BASE + 0xf500)
162 #define TX3927_DMA_MCR_EIS(ch)	(0x10000000<<(ch))
163 #define TX3927_DMA_MCR_DIS(ch)	(0x01000000<<(ch))
164 #define TX3927_DMA_MCR_RSFIF	0x00000080
165 #define TX3927_DMA_MCR_FIFUM(ch)	(0x00000008<<(ch))
166 #define TX3927_DMA_MCR_LE	0x00000004
167 #define TX3927_DMA_MCR_RPRT	0x00000002
168 #define TX3927_DMA_MCR_MSTEN	0x00000001
171 #define TX3927_DMA_CCR_DBINH	0x04000000
172 #define TX3927_DMA_CCR_SBINH	0x02000000
173 #define TX3927_DMA_CCR_CHRST	0x01000000
174 #define TX3927_DMA_CCR_RVBYTE	0x00800000
175 #define TX3927_DMA_CCR_ACKPOL	0x00400000
176 #define TX3927_DMA_CCR_REQPL	0x00200000
177 #define TX3927_DMA_CCR_EGREQ	0x00100000
178 #define TX3927_DMA_CCR_CHDN	0x00080000
179 #define TX3927_DMA_CCR_DNCTL	0x00060000
180 #define TX3927_DMA_CCR_EXTRQ	0x00010000
181 #define TX3927_DMA_CCR_INTRQD	0x0000e000
182 #define TX3927_DMA_CCR_INTENE	0x00001000
183 #define TX3927_DMA_CCR_INTENC	0x00000800
184 #define TX3927_DMA_CCR_INTENT	0x00000400
185 #define TX3927_DMA_CCR_CHNEN	0x00000200
186 #define TX3927_DMA_CCR_XFACT	0x00000100
187 #define TX3927_DMA_CCR_SNOP	0x00000080
188 #define TX3927_DMA_CCR_DSTINC	0x00000040
189 #define TX3927_DMA_CCR_SRCINC	0x00000020
190 #define TX3927_DMA_CCR_XFSZ(order)	(((order) << 2) & 0x0000001c)
196 #define TX3927_DMA_CCR_MEMIO	0x00000002
197 #define TX3927_DMA_CCR_ONEAD	0x00000001
200 #define TX3927_DMA_CSR_CHNACT	0x00000100
201 #define TX3927_DMA_CSR_ABCHC	0x00000080
202 #define TX3927_DMA_CSR_NCHNC	0x00000040
203 #define TX3927_DMA_CSR_NTRNFC	0x00000020
204 #define TX3927_DMA_CSR_EXTDN	0x00000010
205 #define TX3927_DMA_CSR_CFERR	0x00000008
206 #define TX3927_DMA_CSR_CHERR	0x00000004
207 #define TX3927_DMA_CSR_DESERR	0x00000002
208 #define TX3927_DMA_CSR_SORERR	0x00000001
213 #define TX3927_IR_INT0	0
236 #define PCI_STATUS_NEW_CAP	0x0010
239 #define TX3927_PCIC_IIM_ALL	0x00001600
242 #define TX3927_PCIC_TC_OF16E	0x00000020
243 #define TX3927_PCIC_TC_IF8E	0x00000010
244 #define TX3927_PCIC_TC_OF8E	0x00000008
247 #define TX3927_PCIC_TIM_ALL	0x0003ffff
253 #define TX3927_PCIC_PBAPMC_RPBA 0x00000004
254 #define TX3927_PCIC_PBAPMC_PBAEN	0x00000002
255 #define TX3927_PCIC_PBAPMC_BMCEN	0x00000001
258 #define TX3927_PCIC_LBIM_ALL	0x0000003e
261 #define TX3927_PCIC_PCISTATIM_ALL	0x0000f900
264 #define TX3927_PCIC_LBC_IBSE	0x00004000
265 #define TX3927_PCIC_LBC_TIBSE	0x00002000
266 #define TX3927_PCIC_LBC_TMFBSE	0x00001000
267 #define TX3927_PCIC_LBC_HRST	0x00000800
268 #define TX3927_PCIC_LBC_SRST	0x00000400
269 #define TX3927_PCIC_LBC_EPCAD	0x00000200
270 #define TX3927_PCIC_LBC_MSDSE	0x00000100
271 #define TX3927_PCIC_LBC_CRR	0x00000080
272 #define TX3927_PCIC_LBC_ILMDE	0x00000040
273 #define TX3927_PCIC_LBC_ILIDE	0x00000020
282 #define TX3927_CCFG_TLBOFF	0x00020000
283 #define TX3927_CCFG_BEOW	0x00010000
284 #define TX3927_CCFG_WR	0x00008000
285 #define TX3927_CCFG_TOE 0x00004000
286 #define TX3927_CCFG_PCIXARB	0x00002000
287 #define TX3927_CCFG_PCI3	0x00001000
288 #define TX3927_CCFG_PSNP	0x00000800
289 #define TX3927_CCFG_PPRI	0x00000400
290 #define TX3927_CCFG_PLLM	0x00000030
291 #define TX3927_CCFG_ENDIAN	0x00000004
292 #define TX3927_CCFG_HALT	0x00000002
293 #define TX3927_CCFG_ACEHOLD	0x00000001
296 #define TX3927_PCFG_SYSCLKEN	0x08000000
297 #define TX3927_PCFG_SDRCLKEN_ALL	0x07c00000
298 #define TX3927_PCFG_SDRCLKEN(ch)	(0x00400000<<(ch))
299 #define TX3927_PCFG_PCICLKEN_ALL	0x003c0000
300 #define TX3927_PCFG_PCICLKEN(ch)	(0x00040000<<(ch))
301 #define TX3927_PCFG_SELALL	0x0003ffff
302 #define TX3927_PCFG_SELCS	0x00020000
303 #define TX3927_PCFG_SELDSF	0x00010000
304 #define TX3927_PCFG_SELSIOC_ALL 0x0000c000
305 #define TX3927_PCFG_SELSIOC(ch) (0x00004000<<(ch))
306 #define TX3927_PCFG_SELSIO_ALL	0x00003000
307 #define TX3927_PCFG_SELSIO(ch)	(0x00001000<<(ch))
308 #define TX3927_PCFG_SELTMR_ALL	0x00000e00
309 #define TX3927_PCFG_SELTMR(ch)	(0x00000200<<(ch))
310 #define TX3927_PCFG_SELDONE	0x00000100
311 #define TX3927_PCFG_INTDMA_ALL	0x000000f0
312 #define TX3927_PCFG_INTDMA(ch)	(0x00000010<<(ch))
313 #define TX3927_PCFG_SELDMA_ALL	0x0000000f
314 #define TX3927_PCFG_SELDMA(ch)	(0x00000001<<(ch))
325 #define TX3927_ROMC_BA(ch)	(tx3927_romcptr->cr[(ch)] & 0xfff00000)
327 	(0x00100000 << ((tx3927_romcptr->cr[(ch)] >> 8) & 0xf))
328 #define TX3927_ROMC_WIDTH(ch)	(32 >> ((tx3927_romcptr->cr[(ch)] >> 7) & 0x1))