211 		cvmx_write_csr(CVMX_CIU_WDOGX(cpu_logical_map(cpu)), 0);  in octeon_generic_shutdown()
213 	cvmx_write_csr(CVMX_CIU_WDOGX(cvmx_get_core_num()), 0);  in octeon_generic_shutdown()
281 		cvmx_write_csr(CVMX_CIU_WDOGX(cpu_logical_map(cpu)), 0);  in octeon_crash_smp_send_stop()
437 		cvmx_write_csr(CVMX_CIU_WDOGX(cpu_logical_map(cpu)), 0);  in octeon_restart()
439 	cvmx_write_csr(CVMX_CIU_WDOGX(cvmx_get_core_num()), 0);  in octeon_restart()
445 			cvmx_write_csr(CVMX_RST_SOFT_RST, 1);  in octeon_restart()
447 			cvmx_write_csr(CVMX_CIU_SOFT_RST, 1);  in octeon_restart()
464 	cvmx_write_csr(CVMX_CIU_WDOGX(cvmx_get_core_num()), 0);  in octeon_kill_core()
481 		cvmx_write_csr(CVMX_GPIO_BIT_CFGX(12), 1);  in octeon_halt()
482 		cvmx_write_csr(CVMX_GPIO_TX_SET, 0x1000);  in octeon_halt()
639 		cvmx_write_csr(CVMX_IOB_FAU_TIMEOUT, fau_timeout.u64);  in octeon_user_io_init()
650 		cvmx_write_csr(CVMX_POW_NW_TIM, nm_tim.u64);  in octeon_user_io_init()
775 		cvmx_write_csr(CVMX_LED_EN, 0);  in prom_init()
776 		cvmx_write_csr(CVMX_LED_PRT, 0);  in prom_init()
777 		cvmx_write_csr(CVMX_LED_DBG, 0);  in prom_init()
778 		cvmx_write_csr(CVMX_LED_PRT_FMT, 0);  in prom_init()
779 		cvmx_write_csr(CVMX_LED_UDD_CNTX(0), 32);  in prom_init()
780 		cvmx_write_csr(CVMX_LED_UDD_CNTX(1), 32);  in prom_init()
781 		cvmx_write_csr(CVMX_LED_UDD_DATX(0), 0);  in prom_init()
782 		cvmx_write_csr(CVMX_LED_UDD_DATX(1), 0);  in prom_init()
783 		cvmx_write_csr(CVMX_LED_EN, 1);  in prom_init()
852 		cvmx_write_csr(CVMX_CIU_SOFT_BIST, 0);  in prom_init()
854 		cvmx_write_csr(CVMX_CIU_SOFT_BIST, 1);  in prom_init()
1119 	cvmx_write_csr(CVMX_MIO_UARTX_THR(octeon_uart), c & 0xffull);  in prom_putchar()