288 	union cvm_usbdrd_uctl_ctl uctl_ctl;  in dwc3_octeon_clocks_start()  local
359 	uctl_ctl.u64 = cvmx_read_csr(uctl_ctl_reg);  in dwc3_octeon_clocks_start()
360 	uctl_ctl.s.uphy_rst = 1;  in dwc3_octeon_clocks_start()
361 	uctl_ctl.s.uahc_rst = 1;  in dwc3_octeon_clocks_start()
362 	uctl_ctl.s.uctl_rst = 1;  in dwc3_octeon_clocks_start()
363 	cvmx_write_csr(uctl_ctl_reg, uctl_ctl.u64);  in dwc3_octeon_clocks_start()
366 	uctl_ctl.u64 = cvmx_read_csr(uctl_ctl_reg);  in dwc3_octeon_clocks_start()
367 	uctl_ctl.s.h_clkdiv_rst = 1;  in dwc3_octeon_clocks_start()
368 	cvmx_write_csr(uctl_ctl_reg, uctl_ctl.u64);  in dwc3_octeon_clocks_start()
377 	uctl_ctl.u64 = cvmx_read_csr(uctl_ctl_reg);  in dwc3_octeon_clocks_start()
378 	uctl_ctl.s.h_clkdiv_sel = div;  in dwc3_octeon_clocks_start()
379 	uctl_ctl.s.h_clk_en = 1;  in dwc3_octeon_clocks_start()
380 	cvmx_write_csr(uctl_ctl_reg, uctl_ctl.u64);  in dwc3_octeon_clocks_start()
381 	uctl_ctl.u64 = cvmx_read_csr(uctl_ctl_reg);  in dwc3_octeon_clocks_start()
382 	if ((div != uctl_ctl.s.h_clkdiv_sel) || (!uctl_ctl.s.h_clk_en)) {  in dwc3_octeon_clocks_start()
388 	uctl_ctl.u64 = cvmx_read_csr(uctl_ctl_reg);  in dwc3_octeon_clocks_start()
389 	uctl_ctl.s.h_clkdiv_rst = 0;  in dwc3_octeon_clocks_start()
390 	cvmx_write_csr(uctl_ctl_reg, uctl_ctl.u64);  in dwc3_octeon_clocks_start()
393 	uctl_ctl.u64 = cvmx_read_csr(uctl_ctl_reg);  in dwc3_octeon_clocks_start()
394 	uctl_ctl.s.ref_clk_sel = ref_clk_sel;  in dwc3_octeon_clocks_start()
395 	uctl_ctl.s.ref_clk_fsel = 0x07;  in dwc3_octeon_clocks_start()
396 	uctl_ctl.s.ref_clk_div2 = 0;  in dwc3_octeon_clocks_start()
405 			uctl_ctl.s.ref_clk_fsel = 0x27;  in dwc3_octeon_clocks_start()
414 	uctl_ctl.s.mpll_multiplier = mpll_mul;  in dwc3_octeon_clocks_start()
417 	uctl_ctl.s.ssc_en = 1;  in dwc3_octeon_clocks_start()
420 	uctl_ctl.s.ref_ssp_en = 1;  in dwc3_octeon_clocks_start()
425 	uctl_ctl.s.hs_power_en = 1;  in dwc3_octeon_clocks_start()
426 	uctl_ctl.s.ss_power_en = 1;  in dwc3_octeon_clocks_start()
427 	cvmx_write_csr(uctl_ctl_reg, uctl_ctl.u64);  in dwc3_octeon_clocks_start()
433 	uctl_ctl.u64 = cvmx_read_csr(uctl_ctl_reg);  in dwc3_octeon_clocks_start()
434 	uctl_ctl.s.uctl_rst = 0;  in dwc3_octeon_clocks_start()
435 	cvmx_write_csr(uctl_ctl_reg, uctl_ctl.u64);  in dwc3_octeon_clocks_start()
447 	uctl_ctl.u64 = cvmx_read_csr(uctl_ctl_reg);  in dwc3_octeon_clocks_start()
448 	uctl_ctl.s.uahc_rst = 0;  in dwc3_octeon_clocks_start()
449 	cvmx_write_csr(uctl_ctl_reg, uctl_ctl.u64);  in dwc3_octeon_clocks_start()
455 	uctl_ctl.u64 = cvmx_read_csr(uctl_ctl_reg);  in dwc3_octeon_clocks_start()
456 	uctl_ctl.s.csclk_en = 1;  in dwc3_octeon_clocks_start()
457 	cvmx_write_csr(uctl_ctl_reg, uctl_ctl.u64);  in dwc3_octeon_clocks_start()
460 	uctl_ctl.u64 = cvmx_read_csr(uctl_ctl_reg);  in dwc3_octeon_clocks_start()
461 	uctl_ctl.s.drd_mode = 0;  in dwc3_octeon_clocks_start()
462 	cvmx_write_csr(uctl_ctl_reg, uctl_ctl.u64);  in dwc3_octeon_clocks_start()
488 	union cvm_usbdrd_uctl_ctl uctl_ctl;  in dwc3_octeon_phy_reset()  local
491 	uctl_ctl.u64 = cvmx_read_csr(CVMX_USBDRDX_UCTL_CTL(index));  in dwc3_octeon_phy_reset()
492 	uctl_ctl.s.uphy_rst = 0;  in dwc3_octeon_phy_reset()
493 	cvmx_write_csr(CVMX_USBDRDX_UCTL_CTL(index), uctl_ctl.u64);  in dwc3_octeon_phy_reset()