Lines Matching +full:data +full:- +full:active
1 // SPDX-License-Identifier: GPL-2.0-only
17 #include "vgic-mmio.h"
28 return -1UL; in vgic_mmio_read_rao()
53 struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i); in vgic_mmio_read_group()
55 if (irq->group) in vgic_mmio_read_group()
58 vgic_put_irq(vcpu->kvm, irq); in vgic_mmio_read_group()
66 WARN_ON(its_prop_update_vsgi(irq->host_irq, irq->priority, irq->group)); in vgic_update_vsgi()
77 struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i); in vgic_mmio_write_group()
79 raw_spin_lock_irqsave(&irq->irq_lock, flags); in vgic_mmio_write_group()
80 irq->group = !!(val & BIT(i)); in vgic_mmio_write_group()
81 if (irq->hw && vgic_irq_is_sgi(irq->intid)) { in vgic_mmio_write_group()
83 raw_spin_unlock_irqrestore(&irq->irq_lock, flags); in vgic_mmio_write_group()
85 vgic_queue_irq_unlock(vcpu->kvm, irq, flags); in vgic_mmio_write_group()
88 vgic_put_irq(vcpu->kvm, irq); in vgic_mmio_write_group()
105 struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i); in vgic_mmio_read_enable()
107 if (irq->enabled) in vgic_mmio_read_enable()
110 vgic_put_irq(vcpu->kvm, irq); in vgic_mmio_read_enable()
125 struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i); in vgic_mmio_write_senable()
127 raw_spin_lock_irqsave(&irq->irq_lock, flags); in vgic_mmio_write_senable()
128 if (irq->hw && vgic_irq_is_sgi(irq->intid)) { in vgic_mmio_write_senable()
129 if (!irq->enabled) { in vgic_mmio_write_senable()
130 struct irq_data *data; in vgic_mmio_write_senable() local
132 irq->enabled = true; in vgic_mmio_write_senable()
133 data = &irq_to_desc(irq->host_irq)->irq_data; in vgic_mmio_write_senable()
134 while (irqd_irq_disabled(data)) in vgic_mmio_write_senable()
135 enable_irq(irq->host_irq); in vgic_mmio_write_senable()
138 raw_spin_unlock_irqrestore(&irq->irq_lock, flags); in vgic_mmio_write_senable()
139 vgic_put_irq(vcpu->kvm, irq); in vgic_mmio_write_senable()
143 bool was_high = irq->line_level; in vgic_mmio_write_senable()
150 irq->line_level = vgic_get_phys_line_level(irq); in vgic_mmio_write_senable()
155 if (!irq->active && was_high && !irq->line_level) in vgic_mmio_write_senable()
158 irq->enabled = true; in vgic_mmio_write_senable()
159 vgic_queue_irq_unlock(vcpu->kvm, irq, flags); in vgic_mmio_write_senable()
161 vgic_put_irq(vcpu->kvm, irq); in vgic_mmio_write_senable()
174 struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i); in vgic_mmio_write_cenable()
176 raw_spin_lock_irqsave(&irq->irq_lock, flags); in vgic_mmio_write_cenable()
177 if (irq->hw && vgic_irq_is_sgi(irq->intid) && irq->enabled) in vgic_mmio_write_cenable()
178 disable_irq_nosync(irq->host_irq); in vgic_mmio_write_cenable()
180 irq->enabled = false; in vgic_mmio_write_cenable()
182 raw_spin_unlock_irqrestore(&irq->irq_lock, flags); in vgic_mmio_write_cenable()
183 vgic_put_irq(vcpu->kvm, irq); in vgic_mmio_write_cenable()
196 struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i); in vgic_uaccess_write_senable()
198 raw_spin_lock_irqsave(&irq->irq_lock, flags); in vgic_uaccess_write_senable()
199 irq->enabled = true; in vgic_uaccess_write_senable()
200 vgic_queue_irq_unlock(vcpu->kvm, irq, flags); in vgic_uaccess_write_senable()
202 vgic_put_irq(vcpu->kvm, irq); in vgic_uaccess_write_senable()
217 struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i); in vgic_uaccess_write_cenable()
219 raw_spin_lock_irqsave(&irq->irq_lock, flags); in vgic_uaccess_write_cenable()
220 irq->enabled = false; in vgic_uaccess_write_cenable()
221 raw_spin_unlock_irqrestore(&irq->irq_lock, flags); in vgic_uaccess_write_cenable()
223 vgic_put_irq(vcpu->kvm, irq); in vgic_uaccess_write_cenable()
239 struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i); in __read_pending()
243 raw_spin_lock_irqsave(&irq->irq_lock, flags); in __read_pending()
244 if (irq->hw && vgic_irq_is_sgi(irq->intid)) { in __read_pending()
248 err = irq_get_irqchip_state(irq->host_irq, in __read_pending()
251 WARN_RATELIMIT(err, "IRQ %d", irq->host_irq); in __read_pending()
259 raw_spin_unlock_irqrestore(&irq->irq_lock, flags); in __read_pending()
261 vgic_put_irq(vcpu->kvm, irq); in __read_pending()
281 return (vgic_irq_is_sgi(irq->intid) && in is_vgic_v2_sgi()
282 vcpu->kvm->arch.vgic.vgic_model == KVM_DEV_TYPE_ARM_VGIC_V2); in is_vgic_v2_sgi()
294 struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i); in vgic_mmio_write_spending()
298 vgic_put_irq(vcpu->kvm, irq); in vgic_mmio_write_spending()
302 raw_spin_lock_irqsave(&irq->irq_lock, flags); in vgic_mmio_write_spending()
304 if (irq->hw && vgic_irq_is_sgi(irq->intid)) { in vgic_mmio_write_spending()
307 err = irq_set_irqchip_state(irq->host_irq, in vgic_mmio_write_spending()
310 WARN_RATELIMIT(err, "IRQ %d", irq->host_irq); in vgic_mmio_write_spending()
312 raw_spin_unlock_irqrestore(&irq->irq_lock, flags); in vgic_mmio_write_spending()
313 vgic_put_irq(vcpu->kvm, irq); in vgic_mmio_write_spending()
318 irq->pending_latch = true; in vgic_mmio_write_spending()
319 if (irq->hw) in vgic_mmio_write_spending()
322 vgic_queue_irq_unlock(vcpu->kvm, irq, flags); in vgic_mmio_write_spending()
323 vgic_put_irq(vcpu->kvm, irq); in vgic_mmio_write_spending()
336 struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i); in vgic_uaccess_write_spending()
338 raw_spin_lock_irqsave(&irq->irq_lock, flags); in vgic_uaccess_write_spending()
339 irq->pending_latch = true; in vgic_uaccess_write_spending()
347 irq->source |= BIT(vcpu->vcpu_id); in vgic_uaccess_write_spending()
349 vgic_queue_irq_unlock(vcpu->kvm, irq, flags); in vgic_uaccess_write_spending()
351 vgic_put_irq(vcpu->kvm, irq); in vgic_uaccess_write_spending()
357 /* Must be called with irq->irq_lock held */
360 irq->pending_latch = false; in vgic_hw_irq_cpending()
365 * CPENDR for HW interrupts, so we clear the active state on in vgic_hw_irq_cpending()
366 * the physical side if the virtual interrupt is not active. in vgic_hw_irq_cpending()
374 if (!irq->active) in vgic_hw_irq_cpending()
387 struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i); in vgic_mmio_write_cpending()
391 vgic_put_irq(vcpu->kvm, irq); in vgic_mmio_write_cpending()
395 raw_spin_lock_irqsave(&irq->irq_lock, flags); in vgic_mmio_write_cpending()
397 if (irq->hw && vgic_irq_is_sgi(irq->intid)) { in vgic_mmio_write_cpending()
400 err = irq_set_irqchip_state(irq->host_irq, in vgic_mmio_write_cpending()
403 WARN_RATELIMIT(err, "IRQ %d", irq->host_irq); in vgic_mmio_write_cpending()
405 raw_spin_unlock_irqrestore(&irq->irq_lock, flags); in vgic_mmio_write_cpending()
406 vgic_put_irq(vcpu->kvm, irq); in vgic_mmio_write_cpending()
411 if (irq->hw) in vgic_mmio_write_cpending()
414 irq->pending_latch = false; in vgic_mmio_write_cpending()
416 raw_spin_unlock_irqrestore(&irq->irq_lock, flags); in vgic_mmio_write_cpending()
417 vgic_put_irq(vcpu->kvm, irq); in vgic_mmio_write_cpending()
430 struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i); in vgic_uaccess_write_cpending()
432 raw_spin_lock_irqsave(&irq->irq_lock, flags); in vgic_uaccess_write_cpending()
439 irq->source = 0; in vgic_uaccess_write_cpending()
441 irq->pending_latch = false; in vgic_uaccess_write_cpending()
443 raw_spin_unlock_irqrestore(&irq->irq_lock, flags); in vgic_uaccess_write_cpending()
445 vgic_put_irq(vcpu->kvm, irq); in vgic_uaccess_write_cpending()
452 * If we are fiddling with an IRQ's active state, we have to make sure the IRQ
454 * active state can be overwritten when the VCPU's state is synced coming back
464 * active state, which guarantees that the VCPU is not running.
468 if (vcpu->kvm->arch.vgic.vgic_model == KVM_DEV_TYPE_ARM_VGIC_V3 || in vgic_access_active_prepare()
470 kvm_arm_halt_guest(vcpu->kvm); in vgic_access_active_prepare()
476 if (vcpu->kvm->arch.vgic.vgic_model == KVM_DEV_TYPE_ARM_VGIC_V3 || in vgic_access_active_finish()
478 kvm_arm_resume_guest(vcpu->kvm); in vgic_access_active_finish()
490 struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i); in __vgic_mmio_read_active()
496 if (irq->active) in __vgic_mmio_read_active()
499 vgic_put_irq(vcpu->kvm, irq); in __vgic_mmio_read_active()
511 mutex_lock(&vcpu->kvm->lock); in vgic_mmio_read_active()
517 mutex_unlock(&vcpu->kvm->lock); in vgic_mmio_read_active()
528 /* Must be called with irq->irq_lock held */
530 bool active, bool is_uaccess) in vgic_hw_irq_change_active() argument
535 irq->active = active; in vgic_hw_irq_change_active()
536 vgic_irq_set_phys_active(irq, active); in vgic_hw_irq_change_active()
540 bool active) in vgic_mmio_change_active() argument
545 raw_spin_lock_irqsave(&irq->irq_lock, flags); in vgic_mmio_change_active()
547 if (irq->hw && !vgic_irq_is_sgi(irq->intid)) { in vgic_mmio_change_active()
548 vgic_hw_irq_change_active(vcpu, irq, active, !requester_vcpu); in vgic_mmio_change_active()
549 } else if (irq->hw && vgic_irq_is_sgi(irq->intid)) { in vgic_mmio_change_active()
551 * GICv4.1 VSGI feature doesn't track an active state, in vgic_mmio_change_active()
555 irq->active = false; in vgic_mmio_change_active()
557 u32 model = vcpu->kvm->arch.vgic.vgic_model; in vgic_mmio_change_active()
560 irq->active = active; in vgic_mmio_change_active()
565 * the active state is stored somewhere, but at the same time in vgic_mmio_change_active()
573 active_source = (requester_vcpu) ? requester_vcpu->vcpu_id : 0; in vgic_mmio_change_active()
576 active && vgic_irq_is_sgi(irq->intid)) in vgic_mmio_change_active()
577 irq->active_source = active_source; in vgic_mmio_change_active()
580 if (irq->active) in vgic_mmio_change_active()
581 vgic_queue_irq_unlock(vcpu->kvm, irq, flags); in vgic_mmio_change_active()
583 raw_spin_unlock_irqrestore(&irq->irq_lock, flags); in vgic_mmio_change_active()
594 struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i); in __vgic_mmio_write_cactive()
596 vgic_put_irq(vcpu->kvm, irq); in __vgic_mmio_write_cactive()
606 mutex_lock(&vcpu->kvm->lock); in vgic_mmio_write_cactive()
612 mutex_unlock(&vcpu->kvm->lock); in vgic_mmio_write_cactive()
631 struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i); in __vgic_mmio_write_sactive()
633 vgic_put_irq(vcpu->kvm, irq); in __vgic_mmio_write_sactive()
643 mutex_lock(&vcpu->kvm->lock); in vgic_mmio_write_sactive()
649 mutex_unlock(&vcpu->kvm->lock); in vgic_mmio_write_sactive()
668 struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i); in vgic_mmio_read_priority()
670 val |= (u64)irq->priority << (i * 8); in vgic_mmio_read_priority()
672 vgic_put_irq(vcpu->kvm, irq); in vgic_mmio_read_priority()
681 * need to make this VCPU exit and re-evaluate the priorities, potentially
694 struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i); in vgic_mmio_write_priority()
696 raw_spin_lock_irqsave(&irq->irq_lock, flags); in vgic_mmio_write_priority()
698 irq->priority = (val >> (i * 8)) & GENMASK(7, 8 - VGIC_PRI_BITS); in vgic_mmio_write_priority()
699 if (irq->hw && vgic_irq_is_sgi(irq->intid)) in vgic_mmio_write_priority()
701 raw_spin_unlock_irqrestore(&irq->irq_lock, flags); in vgic_mmio_write_priority()
703 vgic_put_irq(vcpu->kvm, irq); in vgic_mmio_write_priority()
715 struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i); in vgic_mmio_read_config()
717 if (irq->config == VGIC_CONFIG_EDGE) in vgic_mmio_read_config()
720 vgic_put_irq(vcpu->kvm, irq); in vgic_mmio_read_config()
741 * make them read-only here. in vgic_mmio_write_config()
746 irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i); in vgic_mmio_write_config()
747 raw_spin_lock_irqsave(&irq->irq_lock, flags); in vgic_mmio_write_config()
750 irq->config = VGIC_CONFIG_EDGE; in vgic_mmio_write_config()
752 irq->config = VGIC_CONFIG_LEVEL; in vgic_mmio_write_config()
754 raw_spin_unlock_irqrestore(&irq->irq_lock, flags); in vgic_mmio_write_config()
755 vgic_put_irq(vcpu->kvm, irq); in vgic_mmio_write_config()
763 int nr_irqs = vcpu->kvm->arch.vgic.nr_spis + VGIC_NR_PRIVATE_IRQS; in vgic_read_irq_line_level_info()
771 irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i); in vgic_read_irq_line_level_info()
772 if (irq->config == VGIC_CONFIG_LEVEL && irq->line_level) in vgic_read_irq_line_level_info()
775 vgic_put_irq(vcpu->kvm, irq); in vgic_read_irq_line_level_info()
785 int nr_irqs = vcpu->kvm->arch.vgic.nr_spis + VGIC_NR_PRIVATE_IRQS; in vgic_write_irq_line_level_info()
795 irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i); in vgic_write_irq_line_level_info()
803 raw_spin_lock_irqsave(&irq->irq_lock, flags); in vgic_write_irq_line_level_info()
804 irq->line_level = new_level; in vgic_write_irq_line_level_info()
806 vgic_queue_irq_unlock(vcpu->kvm, irq, flags); in vgic_write_irq_line_level_info()
808 raw_spin_unlock_irqrestore(&irq->irq_lock, flags); in vgic_write_irq_line_level_info()
810 vgic_put_irq(vcpu->kvm, irq); in vgic_write_irq_line_level_info()
819 if (offset < region->reg_offset) in match_region()
820 return -1; in match_region()
822 if (offset >= region->reg_offset + region->len) in match_region()
858 * We convert this value to the CPUs native format to deal with it as a data
863 unsigned long data = kvm_mmio_read_buf(val, len); in vgic_data_mmio_bus_to_host() local
867 return data; in vgic_data_mmio_bus_to_host()
869 return le16_to_cpu(data); in vgic_data_mmio_bus_to_host()
871 return le32_to_cpu(data); in vgic_data_mmio_bus_to_host()
873 return le64_to_cpu(data); in vgic_data_mmio_bus_to_host()
883 * We convert the data value from the CPUs native format to LE so that the
887 unsigned long data) in vgic_data_host_to_mmio_bus() argument
893 data = cpu_to_le16(data); in vgic_data_host_to_mmio_bus()
896 data = cpu_to_le32(data); in vgic_data_host_to_mmio_bus()
899 data = cpu_to_le64(data); in vgic_data_host_to_mmio_bus()
902 kvm_mmio_write_buf(buf, len, data); in vgic_data_host_to_mmio_bus()
915 int flags, nr_irqs = kvm->arch.vgic.nr_spis + VGIC_NR_PRIVATE_IRQS; in check_region()
931 if ((region->access_flags & flags) && IS_ALIGNED(addr, len)) { in check_region()
932 if (!region->bits_per_irq) in check_region()
935 /* Do we access a non-allocated IRQ? */ in check_region()
936 return VGIC_ADDR_TO_INTID(addr, region->bits_per_irq) < nr_irqs; in check_region()
948 region = vgic_find_mmio_region(iodev->regions, iodev->nr_regions, in vgic_get_mmio_region()
949 addr - iodev->base_addr); in vgic_get_mmio_region()
950 if (!region || !check_region(vcpu->kvm, region, addr, len)) in vgic_get_mmio_region()
969 r_vcpu = iodev->redist_vcpu ? iodev->redist_vcpu : vcpu; in vgic_uaccess_read()
970 if (region->uaccess_read) in vgic_uaccess_read()
971 *val = region->uaccess_read(r_vcpu, addr, sizeof(u32)); in vgic_uaccess_read()
973 *val = region->read(r_vcpu, addr, sizeof(u32)); in vgic_uaccess_read()
989 r_vcpu = iodev->redist_vcpu ? iodev->redist_vcpu : vcpu; in vgic_uaccess_write()
990 if (region->uaccess_write) in vgic_uaccess_write()
991 return region->uaccess_write(r_vcpu, addr, sizeof(u32), *val); in vgic_uaccess_write()
993 region->write(r_vcpu, addr, sizeof(u32), *val); in vgic_uaccess_write()
1004 return vgic_uaccess_write(vcpu, &dev->dev, offset, val); in vgic_uaccess()
1006 return vgic_uaccess_read(vcpu, &dev->dev, offset, val); in vgic_uaccess()
1014 unsigned long data = 0; in dispatch_mmio_read() local
1022 switch (iodev->iodev_type) { in dispatch_mmio_read()
1024 data = region->read(vcpu, addr, len); in dispatch_mmio_read()
1027 data = region->read(vcpu, addr, len); in dispatch_mmio_read()
1030 data = region->read(iodev->redist_vcpu, addr, len); in dispatch_mmio_read()
1033 data = region->its_read(vcpu->kvm, iodev->its, addr, len); in dispatch_mmio_read()
1037 vgic_data_host_to_mmio_bus(val, len, data); in dispatch_mmio_read()
1046 unsigned long data = vgic_data_mmio_bus_to_host(val, len); in dispatch_mmio_write() local
1052 switch (iodev->iodev_type) { in dispatch_mmio_write()
1054 region->write(vcpu, addr, len, data); in dispatch_mmio_write()
1057 region->write(vcpu, addr, len, data); in dispatch_mmio_write()
1060 region->write(iodev->redist_vcpu, addr, len, data); in dispatch_mmio_write()
1063 region->its_write(vcpu->kvm, iodev->its, addr, len, data); in dispatch_mmio_write()
1078 struct vgic_io_device *io_device = &kvm->arch.vgic.dist_iodev; in vgic_register_dist_iodev()
1093 io_device->base_addr = dist_base_address; in vgic_register_dist_iodev()
1094 io_device->iodev_type = IODEV_DIST; in vgic_register_dist_iodev()
1095 io_device->redist_vcpu = NULL; in vgic_register_dist_iodev()
1097 mutex_lock(&kvm->slots_lock); in vgic_register_dist_iodev()
1099 len, &io_device->dev); in vgic_register_dist_iodev()
1100 mutex_unlock(&kvm->slots_lock); in vgic_register_dist_iodev()