227 	struct vgic_cpu *vgic_cpu = &vcpu->arch.vgic_cpu;  in vgic_mmio_read_v3r_ctlr()  local
229 	return vgic_cpu->lpis_enabled ? GICR_CTLR_ENABLE_LPIS : 0;  in vgic_mmio_read_v3r_ctlr()
237 	struct vgic_cpu *vgic_cpu = &vcpu->arch.vgic_cpu;  in vgic_mmio_write_v3r_ctlr()  local
238 	bool was_enabled = vgic_cpu->lpis_enabled;  in vgic_mmio_write_v3r_ctlr()
243 	vgic_cpu->lpis_enabled = val & GICR_CTLR_ENABLE_LPIS;  in vgic_mmio_write_v3r_ctlr()
245 	if (was_enabled && !vgic_cpu->lpis_enabled) {  in vgic_mmio_write_v3r_ctlr()
250 	if (!was_enabled && vgic_cpu->lpis_enabled)  in vgic_mmio_write_v3r_ctlr()
258 	struct vgic_cpu *vgic_cpu = &vcpu->arch.vgic_cpu;  in vgic_mmio_read_v3r_typer()  local
259 	struct vgic_redist_region *rdreg = vgic_cpu->rdreg;  in vgic_mmio_read_v3r_typer()
474 	struct vgic_cpu *vgic_cpu = &vcpu->arch.vgic_cpu;  in vgic_mmio_write_propbase()  local
478 	if (vgic_cpu->lpis_enabled)  in vgic_mmio_write_propbase()
493 	struct vgic_cpu *vgic_cpu = &vcpu->arch.vgic_cpu;  in vgic_mmio_read_pendbase()  local
494 	u64 value = vgic_cpu->pendbaser;  in vgic_mmio_read_pendbase()
505 	struct vgic_cpu *vgic_cpu = &vcpu->arch.vgic_cpu;  in vgic_mmio_write_pendbase()  local
509 	if (vgic_cpu->lpis_enabled)  in vgic_mmio_write_pendbase()
513 		old_pendbaser = READ_ONCE(vgic_cpu->pendbaser);  in vgic_mmio_write_pendbase()
517 	} while (cmpxchg64(&vgic_cpu->pendbaser, old_pendbaser,  in vgic_mmio_write_pendbase()
694 	struct vgic_cpu *vgic_cpu = &vcpu->arch.vgic_cpu;  in vgic_register_redist_iodev()  local
695 	struct vgic_io_device *rd_dev = &vcpu->arch.vgic_cpu.rd_iodev;  in vgic_register_redist_iodev()
700 	if (!IS_VGIC_ADDR_UNDEF(vgic_cpu->rd_iodev.base_addr))  in vgic_register_redist_iodev()
716 	vgic_cpu->rdreg = rdreg;  in vgic_register_redist_iodev()
741 	struct vgic_io_device *rd_dev = &vcpu->arch.vgic_cpu.rd_iodev;  in vgic_unregister_redist_iodev()