463 void __vgic_v3_write_vmcr(u32 vmcr)  in __vgic_v3_write_vmcr()  argument
465 	write_gicreg(vmcr, ICH_VMCR_EL2);  in __vgic_v3_write_vmcr()
484 static int __vgic_v3_highest_priority_lr(struct kvm_vcpu *vcpu, u32 vmcr,  in __vgic_v3_highest_priority_lr()  argument
500 		if (!(val & ICH_LR_GROUP) && !(vmcr & ICH_VMCR_ENG0_MASK))  in __vgic_v3_highest_priority_lr()
504 		if ((val & ICH_LR_GROUP) && !(vmcr & ICH_VMCR_ENG1_MASK))  in __vgic_v3_highest_priority_lr()
575 static unsigned int __vgic_v3_get_bpr0(u32 vmcr)  in __vgic_v3_get_bpr0()  argument
577 	return (vmcr & ICH_VMCR_BPR0_MASK) >> ICH_VMCR_BPR0_SHIFT;  in __vgic_v3_get_bpr0()
580 static unsigned int __vgic_v3_get_bpr1(u32 vmcr)  in __vgic_v3_get_bpr1()  argument
584 	if (vmcr & ICH_VMCR_CBPR_MASK) {  in __vgic_v3_get_bpr1()
585 		bpr = __vgic_v3_get_bpr0(vmcr);  in __vgic_v3_get_bpr1()
589 		bpr = (vmcr & ICH_VMCR_BPR1_MASK) >> ICH_VMCR_BPR1_SHIFT;  in __vgic_v3_get_bpr1()
599 static u8 __vgic_v3_pri_to_pre(u8 pri, u32 vmcr, int grp)  in __vgic_v3_pri_to_pre()  argument
604 		bpr = __vgic_v3_get_bpr0(vmcr) + 1;  in __vgic_v3_pri_to_pre()
606 		bpr = __vgic_v3_get_bpr1(vmcr);  in __vgic_v3_pri_to_pre()
617 static void __vgic_v3_set_active_priority(u8 pri, u32 vmcr, int grp)  in __vgic_v3_set_active_priority()  argument
623 	pre = __vgic_v3_pri_to_pre(pri, vmcr, grp);  in __vgic_v3_set_active_priority()
674 static void __vgic_v3_read_iar(struct kvm_vcpu *vcpu, u32 vmcr, int rt)  in __vgic_v3_read_iar()  argument
682 	lr = __vgic_v3_highest_priority_lr(vcpu, vmcr, &lr_val);  in __vgic_v3_read_iar()
689 	pmr = (vmcr & ICH_VMCR_PMR_MASK) >> ICH_VMCR_PMR_SHIFT;  in __vgic_v3_read_iar()
694 	if (__vgic_v3_get_highest_active_priority() <= __vgic_v3_pri_to_pre(lr_prio, vmcr, grp))  in __vgic_v3_read_iar()
702 	__vgic_v3_set_active_priority(lr_prio, vmcr, grp);  in __vgic_v3_read_iar()
732 static void __vgic_v3_write_dir(struct kvm_vcpu *vcpu, u32 vmcr, int rt)  in __vgic_v3_write_dir()  argument
739 	if (!(vmcr & ICH_VMCR_EOIM_MASK))  in __vgic_v3_write_dir()
755 static void __vgic_v3_write_eoir(struct kvm_vcpu *vcpu, u32 vmcr, int rt)  in __vgic_v3_write_eoir()  argument
772 	if (vmcr & ICH_VMCR_EOIM_MASK)  in __vgic_v3_write_eoir()
785 	    __vgic_v3_pri_to_pre(lr_prio, vmcr, grp) != act_prio)  in __vgic_v3_write_eoir()
792 static void __vgic_v3_read_igrpen0(struct kvm_vcpu *vcpu, u32 vmcr, int rt)  in __vgic_v3_read_igrpen0()  argument
794 	vcpu_set_reg(vcpu, rt, !!(vmcr & ICH_VMCR_ENG0_MASK));  in __vgic_v3_read_igrpen0()
797 static void __vgic_v3_read_igrpen1(struct kvm_vcpu *vcpu, u32 vmcr, int rt)  in __vgic_v3_read_igrpen1()  argument
799 	vcpu_set_reg(vcpu, rt, !!(vmcr & ICH_VMCR_ENG1_MASK));  in __vgic_v3_read_igrpen1()
802 static void __vgic_v3_write_igrpen0(struct kvm_vcpu *vcpu, u32 vmcr, int rt)  in __vgic_v3_write_igrpen0()  argument
807 		vmcr |= ICH_VMCR_ENG0_MASK;  in __vgic_v3_write_igrpen0()
809 		vmcr &= ~ICH_VMCR_ENG0_MASK;  in __vgic_v3_write_igrpen0()
811 	__vgic_v3_write_vmcr(vmcr);  in __vgic_v3_write_igrpen0()
814 static void __vgic_v3_write_igrpen1(struct kvm_vcpu *vcpu, u32 vmcr, int rt)  in __vgic_v3_write_igrpen1()  argument
819 		vmcr |= ICH_VMCR_ENG1_MASK;  in __vgic_v3_write_igrpen1()
821 		vmcr &= ~ICH_VMCR_ENG1_MASK;  in __vgic_v3_write_igrpen1()
823 	__vgic_v3_write_vmcr(vmcr);  in __vgic_v3_write_igrpen1()
826 static void __vgic_v3_read_bpr0(struct kvm_vcpu *vcpu, u32 vmcr, int rt)  in __vgic_v3_read_bpr0()  argument
828 	vcpu_set_reg(vcpu, rt, __vgic_v3_get_bpr0(vmcr));  in __vgic_v3_read_bpr0()
831 static void __vgic_v3_read_bpr1(struct kvm_vcpu *vcpu, u32 vmcr, int rt)  in __vgic_v3_read_bpr1()  argument
833 	vcpu_set_reg(vcpu, rt, __vgic_v3_get_bpr1(vmcr));  in __vgic_v3_read_bpr1()
836 static void __vgic_v3_write_bpr0(struct kvm_vcpu *vcpu, u32 vmcr, int rt)  in __vgic_v3_write_bpr0()  argument
847 	vmcr &= ~ICH_VMCR_BPR0_MASK;  in __vgic_v3_write_bpr0()
848 	vmcr |= val;  in __vgic_v3_write_bpr0()
850 	__vgic_v3_write_vmcr(vmcr);  in __vgic_v3_write_bpr0()
853 static void __vgic_v3_write_bpr1(struct kvm_vcpu *vcpu, u32 vmcr, int rt)  in __vgic_v3_write_bpr1()  argument
858 	if (vmcr & ICH_VMCR_CBPR_MASK)  in __vgic_v3_write_bpr1()
867 	vmcr &= ~ICH_VMCR_BPR1_MASK;  in __vgic_v3_write_bpr1()
868 	vmcr |= val;  in __vgic_v3_write_bpr1()
870 	__vgic_v3_write_vmcr(vmcr);  in __vgic_v3_write_bpr1()
896 					    u32 vmcr, int rt)  in __vgic_v3_read_apxr0()  argument
902 					    u32 vmcr, int rt)  in __vgic_v3_read_apxr1()  argument
907 static void __vgic_v3_read_apxr2(struct kvm_vcpu *vcpu, u32 vmcr, int rt)  in __vgic_v3_read_apxr2()  argument
912 static void __vgic_v3_read_apxr3(struct kvm_vcpu *vcpu, u32 vmcr, int rt)  in __vgic_v3_read_apxr3()  argument
917 static void __vgic_v3_write_apxr0(struct kvm_vcpu *vcpu, u32 vmcr, int rt)  in __vgic_v3_write_apxr0()  argument
922 static void __vgic_v3_write_apxr1(struct kvm_vcpu *vcpu, u32 vmcr, int rt)  in __vgic_v3_write_apxr1()  argument
927 static void __vgic_v3_write_apxr2(struct kvm_vcpu *vcpu, u32 vmcr, int rt)  in __vgic_v3_write_apxr2()  argument
932 static void __vgic_v3_write_apxr3(struct kvm_vcpu *vcpu, u32 vmcr, int rt)  in __vgic_v3_write_apxr3()  argument
937 static void __vgic_v3_read_hppir(struct kvm_vcpu *vcpu, u32 vmcr, int rt)  in __vgic_v3_read_hppir()  argument
944 	lr = __vgic_v3_highest_priority_lr(vcpu, vmcr, &lr_val);  in __vgic_v3_read_hppir()
956 static void __vgic_v3_read_pmr(struct kvm_vcpu *vcpu, u32 vmcr, int rt)  in __vgic_v3_read_pmr()  argument
958 	vmcr &= ICH_VMCR_PMR_MASK;  in __vgic_v3_read_pmr()
959 	vmcr >>= ICH_VMCR_PMR_SHIFT;  in __vgic_v3_read_pmr()
960 	vcpu_set_reg(vcpu, rt, vmcr);  in __vgic_v3_read_pmr()
963 static void __vgic_v3_write_pmr(struct kvm_vcpu *vcpu, u32 vmcr, int rt)  in __vgic_v3_write_pmr()  argument
969 	vmcr &= ~ICH_VMCR_PMR_MASK;  in __vgic_v3_write_pmr()
970 	vmcr |= val;  in __vgic_v3_write_pmr()
972 	write_gicreg(vmcr, ICH_VMCR_EL2);  in __vgic_v3_write_pmr()
975 static void __vgic_v3_read_rpr(struct kvm_vcpu *vcpu, u32 vmcr, int rt)  in __vgic_v3_read_rpr()  argument
981 static void __vgic_v3_read_ctlr(struct kvm_vcpu *vcpu, u32 vmcr, int rt)  in __vgic_v3_read_ctlr()  argument
995 	val |= ((vmcr & ICH_VMCR_EOIM_MASK) >> ICH_VMCR_EOIM_SHIFT) << ICC_CTLR_EL1_EOImode_SHIFT;  in __vgic_v3_read_ctlr()
997 	val |= (vmcr & ICH_VMCR_CBPR_MASK) >> ICH_VMCR_CBPR_SHIFT;  in __vgic_v3_read_ctlr()
1002 static void __vgic_v3_write_ctlr(struct kvm_vcpu *vcpu, u32 vmcr, int rt)  in __vgic_v3_write_ctlr()  argument
1007 		vmcr |= ICH_VMCR_CBPR_MASK;  in __vgic_v3_write_ctlr()
1009 		vmcr &= ~ICH_VMCR_CBPR_MASK;  in __vgic_v3_write_ctlr()
1012 		vmcr |= ICH_VMCR_EOIM_MASK;  in __vgic_v3_write_ctlr()
1014 		vmcr &= ~ICH_VMCR_EOIM_MASK;  in __vgic_v3_write_ctlr()
1016 	write_gicreg(vmcr, ICH_VMCR_EL2);  in __vgic_v3_write_ctlr()
1023 	u32 vmcr;  in __vgic_v3_perform_cpuif_access()  local
1139 	vmcr = __vgic_v3_read_vmcr();  in __vgic_v3_perform_cpuif_access()
1141 	fn(vcpu, vmcr, rt);  in __vgic_v3_perform_cpuif_access()