Lines Matching +full:25 +full:mhz
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654 //022d 003d //VPLL=99MHz (ref26MHz) 4032984*26/1024x1024=99M
795 0429 000a //LVDSTX0_PLLGAIN 2'b10: 30 MHz ~ 80 MHz
797 0529 000a //LVDSTX1_PLLGAIN 2'b10: 30 MHz ~ 80 MHz
870 //022d 003d //VPLL=99MHz (ref26MHz) 4032984*26/1024x1024=99M
1010 0429 000a //LVDSTX0_PLLGAIN 2'b10: 30 MHz ~ 80 MHz
1012 0529 000a //LVDSTX1_PLLGAIN 2'b10: 30 MHz ~ 80 MHz
1303 //022d 003d //VPLL=99MHz (ref26MHz) 4032984*26/1024x1024=99M
1446 0429 000a //LVDSTX0_PLLGAIN 2'b10: 30 MHz ~ 80 MHz
1448 0529 000a //LVDSTX1_PLLGAIN 2'b10: 30 MHz ~ 80 MHz
1718 //022d 003d //VPLL=99MHz (ref26MHz) 4032984*26/1024x1024=99M
1858 0429 000a //LVDSTX0_PLLGAIN 2'b10: 30 MHz ~ 80 MHz
1860 0529 000a //LVDSTX1_PLLGAIN 2'b10: 30 MHz ~ 80 MHz