Lines Matching +full:0 +full:xff890000
56 #size-cells = <0>;
84 cpu_l0: cpu@0 {
87 reg = <0x0 0x0>;
99 reg = <0x0 0x1>;
111 reg = <0x0 0x2>;
123 reg = <0x0 0x3>;
135 reg = <0x0 0x100>;
147 reg = <0x0 0x101>;
162 arm,psci-suspend-param = <0x0010000>;
171 arm,psci-suspend-param = <0x1010000>;
203 interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW 0>,
204 <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW 0>,
205 <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW 0>,
206 <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW 0>;
214 #clock-cells = <0>;
219 clock-frequency = <0>;
221 #clock-cells = <0>;
226 clock-frequency = <0>;
228 #clock-cells = <0>;
239 reg = <0x0 0xff6d0000 0x0 0x4000>;
240 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH 0>,
241 <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH 0>;
250 reg = <0x0 0xff6e0000 0x0 0x4000>;
251 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH 0>,
252 <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH 0>;
262 reg = <0x0 0xf8000000 0x0 0x2000000>,
263 <0x0 0xfd000000 0x0 0x1000000>;
270 bus-range = <0x0 0x1f>;
275 interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH 0>,
276 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH 0>,
277 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH 0>;
279 interrupt-map-mask = <0 0 0 7>;
280 interrupt-map = <0 0 0 1 &pcie0_intc 0>,
281 <0 0 0 2 &pcie0_intc 1>,
282 <0 0 0 3 &pcie0_intc 2>,
283 <0 0 0 4 &pcie0_intc 3>;
285 msi-map = <0x0 &its 0x0 0x1000>;
286 phys = <&pcie_phy 0>, <&pcie_phy 1>,
288 phy-names = "pcie-phy-0", "pcie-phy-1",
291 ranges = <0x83000000 0x0 0xfa000000 0x0 0xfa000000 0x0 0x1e00000
292 0x81000000 0x0 0xfbe00000 0x0 0xfbe00000 0x0 0x100000>;
303 #address-cells = <0>;
310 reg = <0x0 0xfe300000 0x0 0x10000>;
311 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH 0>;
325 snps,txpbl = <0x4>;
332 reg = <0x0 0xfe310000 0x0 0x4000>;
333 interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH 0>;
338 fifo-depth = <0x100>;
348 reg = <0x0 0xfe320000 0x0 0x4000>;
349 interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH 0>;
356 fifo-depth = <0x100>;
365 reg = <0x0 0xfe330000 0x0 0x10000>;
366 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH 0>;
373 #clock-cells = <0>;
384 reg = <0x0 0xfe380000 0x0 0x20000>;
385 interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH 0>;
395 reg = <0x0 0xfe3a0000 0x0 0x20000>;
396 interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH 0>;
406 reg = <0x0 0xfe3c0000 0x0 0x20000>;
407 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH 0>;
417 reg = <0x0 0xfe3e0000 0x0 0x20000>;
418 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH 0>;
441 reg = <0x0 0xfe800000 0x0 0x100000>;
442 interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH 0>;
480 reg = <0x0 0xfe900000 0x0 0x100000>;
481 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH 0>;
504 reg = <0x0 0xfec00000 0x0 0x100000>;
505 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH 0>;
523 #size-cells = <0>;
525 dp_in_vopb: endpoint@0 {
526 reg = <0>;
546 reg = <0x0 0xfee00000 0 0x10000>, /* GICD */
547 <0x0 0xfef00000 0 0xc0000>, /* GICR */
548 <0x0 0xfff00000 0 0x10000>, /* GICC */
549 <0x0 0xfff10000 0 0x10000>, /* GICH */
550 <0x0 0xfff20000 0 0x10000>; /* GICV */
551 interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH 0>;
556 reg = <0x0 0xfee20000 0x0 0x20000>;
560 ppi_cluster0: interrupt-partition-0 {
572 reg = <0x0 0xff100000 0x0 0x100>;
573 interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH 0>;
584 reg = <0x0 0xff110000 0x0 0x1000>;
589 interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH 0>;
591 pinctrl-0 = <&i2c1_xfer>;
593 #size-cells = <0>;
599 reg = <0x0 0xff120000 0x0 0x1000>;
604 interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH 0>;
606 pinctrl-0 = <&i2c2_xfer>;
608 #size-cells = <0>;
614 reg = <0x0 0xff130000 0x0 0x1000>;
619 interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH 0>;
621 pinctrl-0 = <&i2c3_xfer>;
623 #size-cells = <0>;
629 reg = <0x0 0xff140000 0x0 0x1000>;
634 interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH 0>;
636 pinctrl-0 = <&i2c5_xfer>;
638 #size-cells = <0>;
644 reg = <0x0 0xff150000 0x0 0x1000>;
649 interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH 0>;
651 pinctrl-0 = <&i2c6_xfer>;
653 #size-cells = <0>;
659 reg = <0x0 0xff160000 0x0 0x1000>;
664 interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH 0>;
666 pinctrl-0 = <&i2c7_xfer>;
668 #size-cells = <0>;
674 reg = <0x0 0xff180000 0x0 0x100>;
677 interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH 0>;
681 pinctrl-0 = <&uart0_xfer>;
687 reg = <0x0 0xff190000 0x0 0x100>;
690 interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH 0>;
694 pinctrl-0 = <&uart1_xfer>;
700 reg = <0x0 0xff1a0000 0x0 0x100>;
703 interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH 0>;
707 pinctrl-0 = <&uart2c_xfer>;
713 reg = <0x0 0xff1b0000 0x0 0x100>;
716 interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH 0>;
720 pinctrl-0 = <&uart3_xfer>;
726 reg = <0x0 0xff1c0000 0x0 0x1000>;
729 interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH 0>;
733 pinctrl-0 = <&spi0_clk &spi0_tx &spi0_rx &spi0_cs0>;
735 #size-cells = <0>;
741 reg = <0x0 0xff1d0000 0x0 0x1000>;
744 interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH 0>;
748 pinctrl-0 = <&spi1_clk &spi1_tx &spi1_rx &spi1_cs0>;
750 #size-cells = <0>;
756 reg = <0x0 0xff1e0000 0x0 0x1000>;
759 interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH 0>;
763 pinctrl-0 = <&spi2_clk &spi2_tx &spi2_rx &spi2_cs0>;
765 #size-cells = <0>;
771 reg = <0x0 0xff1f0000 0x0 0x1000>;
774 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH 0>;
778 pinctrl-0 = <&spi4_clk &spi4_tx &spi4_rx &spi4_cs0>;
780 #size-cells = <0>;
786 reg = <0x0 0xff200000 0x0 0x1000>;
789 interrupts = <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH 0>;
793 pinctrl-0 = <&spi5_clk &spi5_tx &spi5_rx &spi5_cs0>;
796 #size-cells = <0>;
806 thermal-sensors = <&tsadc 0>;
858 reg = <0x0 0xff260000 0x0 0x100>;
859 interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH 0>;
869 pinctrl-0 = <&otp_pin>;
877 reg = <0x0 0xffa58000 0x0 0x20>;
882 reg = <0x0 0xffa5c000 0x0 0x20>;
887 reg = <0x0 0xffa60080 0x0 0x20>;
892 reg = <0x0 0xffa60100 0x0 0x20>;
897 reg = <0x0 0xffa60180 0x0 0x20>;
902 reg = <0x0 0xffa70000 0x0 0x20>;
907 reg = <0x0 0xffa70080 0x0 0x20>;
912 reg = <0x0 0xffa74000 0x0 0x20>;
917 reg = <0x0 0xffa76000 0x0 0x20>;
922 reg = <0x0 0xffa90000 0x0 0x20>;
927 reg = <0x0 0xffa98000 0x0 0x20>;
932 reg = <0x0 0xffaa0000 0x0 0x20>;
937 reg = <0x0 0xffaa0080 0x0 0x20>;
942 reg = <0x0 0xffaa8000 0x0 0x20>;
947 reg = <0x0 0xffaa8080 0x0 0x20>;
952 reg = <0x0 0xffab0000 0x0 0x20>;
957 reg = <0x0 0xffab0080 0x0 0x20>;
962 reg = <0x0 0xffab8000 0x0 0x20>;
967 reg = <0x0 0xffac0000 0x0 0x20>;
972 reg = <0x0 0xffac0080 0x0 0x20>;
977 reg = <0x0 0xffac8000 0x0 0x20>;
982 reg = <0x0 0xffac8080 0x0 0x20>;
987 reg = <0x0 0xffad0000 0x0 0x20>;
992 reg = <0x0 0xffad8080 0x0 0x20>;
997 reg = <0x0 0xffae0000 0x0 0x20>;
1002 reg = <0x0 0xff310000 0x0 0x1000>;
1015 #size-cells = <0>;
1071 #size-cells = <0>;
1109 #size-cells = <0>;
1135 #size-cells = <0>;
1157 reg = <0x0 0xff320000 0x0 0x1000>;
1166 offset = <0x300>;
1179 #size-cells = <0>;
1194 reg = <0x0 0xff350000 0x0 0x1000>;
1197 interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH 0>;
1199 pinctrl-0 = <&spi3_clk &spi3_tx &spi3_rx &spi3_cs0>;
1201 #size-cells = <0>;
1207 reg = <0x0 0xff370000 0x0 0x100>;
1210 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH 0>;
1214 pinctrl-0 = <&uart4_xfer>;
1220 reg = <0x0 0xff3c0000 0x0 0x1000>;
1225 interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH 0>;
1227 pinctrl-0 = <&i2c0_xfer>;
1229 #size-cells = <0>;
1235 reg = <0x0 0xff3d0000 0x0 0x1000>;
1240 interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH 0>;
1242 pinctrl-0 = <&i2c4_xfer>;
1244 #size-cells = <0>;
1250 reg = <0x0 0xff3e0000 0x0 0x1000>;
1255 interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH 0>;
1257 pinctrl-0 = <&i2c8_xfer>;
1259 #size-cells = <0>;
1265 reg = <0x0 0xff420000 0x0 0x10>;
1268 pinctrl-0 = <&pwm0_pin>;
1276 reg = <0x0 0xff420010 0x0 0x10>;
1279 pinctrl-0 = <&pwm1_pin>;
1287 reg = <0x0 0xff420020 0x0 0x10>;
1290 pinctrl-0 = <&pwm2_pin>;
1298 reg = <0x0 0xff420030 0x0 0x10>;
1301 pinctrl-0 = <&pwm3a_pin>;
1308 reg = <0x00 0xff630000 0x00 0x4000>;
1319 interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH 0>;
1335 reg = <0x0 0xff650000 0x0 0x800>;
1336 interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH 0>,
1337 <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH 0>;
1348 reg = <0x0 0xff650000 0x0 0x400>;
1349 interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH 0>;
1357 rockchip,taskqueue-node = <0>;
1358 rockchip,resetgroup-node = <0>;
1365 reg = <0x0 0xff650400 0x0 0x400>;
1366 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH 0>;
1375 rockchip,taskqueue-node = <0>;
1376 rockchip,resetgroup-node = <0>;
1382 reg = <0x0 0xff650800 0x0 0x40>;
1383 interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH 0>;
1387 #iommu-cells = <0>;
1394 reg = <0x0 0xff660000 0x0 0x400>;
1395 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH 0>;
1406 reg = <0x0 0xff660000 0x0 0x400>;
1407 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH 0>;
1428 reg = <0x0 0xff660480 0x0 0x40>, <0x0 0xff6604c0 0x0 0x40>;
1429 interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH 0>;
1434 #iommu-cells = <0>;
1442 reg = <0x0 0xff670000 0x0 0x800>;
1443 interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH 0>;
1454 reg = <0x0 0xff670800 0x0 0x40>;
1455 interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH 0>;
1460 #iommu-cells = <0>;
1466 reg = <0x0 0xff680000 0x0 0x10000>;
1467 interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH 0>;
1477 reg = <0x0 0xff690000 0x0 0x80>;
1485 reg = <0x06 0x1>;
1486 bits = <0 5>;
1489 reg = <0x07 0x10>;
1492 reg = <0x17 0x1>;
1495 reg = <0x18 0x1>;
1498 reg = <0x19 0x1>;
1501 reg = <0x1a 0x1>;
1504 reg = <0x1b 0x1>;
1507 reg = <0x1c 0x1>;
1510 reg = <0x22 0x1>;
1517 reg = <0x0 0xff750000 0x0 0x1000>;
1527 reg = <0x0 0xff760000 0x0 0x1000>;
1557 reg = <0x0 0xff770000 0x0 0x10000>;
1573 #phy-cells = <0>;
1579 reg = <0xe450 0x10>;
1582 #clock-cells = <0>;
1587 #phy-cells = <0>;
1588 interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH 0>;
1594 #phy-cells = <0>;
1595 interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH 0>,
1596 <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH 0>,
1597 <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH 0>;
1606 reg = <0xe460 0x10>;
1609 #clock-cells = <0>;
1614 #phy-cells = <0>;
1615 interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH 0>;
1621 #phy-cells = <0>;
1622 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH 0>,
1623 <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH 0>,
1624 <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH 0>;
1633 reg = <0xf780 0x24>;
1637 #phy-cells = <0>;
1654 #size-cells = <0>;
1657 pvtm@0 {
1658 reg = <0>;
1690 reg = <0x0 0xff7c0000 0x0 0x40000>;
1705 #phy-cells = <0>;
1709 #phy-cells = <0>;
1715 reg = <0x0 0xff800000 0x0 0x40000>;
1730 #phy-cells = <0>;
1734 #phy-cells = <0>;
1740 reg = <0x0 0xff848000 0x0 0x100>;
1742 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH 0>;
1747 reg = <0x0 0xff850000 0x0 0x1000>;
1748 interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH 0>;
1755 reg = <0x0 0xff870000 0x0 0x1000>;
1756 interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH 0>;
1762 pinctrl-0 = <&spdif_bus>;
1764 #sound-dai-cells = <0>;
1770 reg = <0x0 0xff880000 0x0 0x1000>;
1772 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH 0>;
1773 dmas = <&dmac_bus 0>, <&dmac_bus 1>;
1780 pinctrl-0 = <&i2s0_8ch_bus>;
1782 #sound-dai-cells = <0>;
1788 reg = <0x0 0xff890000 0x0 0x1000>;
1789 interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH 0>;
1797 pinctrl-0 = <&i2s1_2ch_bus>;
1799 #sound-dai-cells = <0>;
1805 reg = <0x0 0xff8a0000 0x0 0x1000>;
1806 interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH 0>;
1814 #sound-dai-cells = <0>;
1820 reg = <0x0 0xff8b8000 0x0 0x1000>;
1830 reg = <0x0 0xff8f0000 0x0 0x600>,
1831 <0x0 0xff8f1c00 0x0 0x200>,
1832 <0x0 0xff8f2000 0x0 0x400>;
1834 interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH 0>;
1845 #size-cells = <0>;
1847 vopl_out_dsi: endpoint@0 {
1848 reg = <0>;
1876 reg = <0x0 0xff8f01a0 0x0 0x10>;
1879 pinctrl-0 = <&vop1_pwm_pin>;
1887 reg = <0x0 0xff8f3f00 0x0 0x100>;
1888 interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH 0>;
1893 #iommu-cells = <0>;
1900 reg = <0x0 0xff900000 0x0 0x600>,
1901 <0x0 0xff901c00 0x0 0x200>,
1902 <0x0 0xff902000 0x0 0x1000>;
1904 interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH 0>;
1915 #size-cells = <0>;
1917 vopb_out_edp: endpoint@0 {
1918 reg = <0>;
1946 reg = <0x0 0xff9001a0 0x0 0x10>;
1949 pinctrl-0 = <&vop0_pwm_pin>;
1957 reg = <0x0 0xff903f00 0x0 0x100>;
1958 interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH 0>;
1963 #iommu-cells = <0>;
1970 reg = <0x0 0xff910000 0x0 0x4000>;
1971 interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH 0>;
1987 reg = <0x0 0xff914000 0x0 0x100>, <0x0 0xff915000 0x0 0x100>;
1988 interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH 0>;
1992 #iommu-cells = <0>;
2000 reg = <0x0 0xff920000 0x0 0x4000>;
2001 interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH 0>;
2019 reg = <0x0 0xff924000 0x0 0x100>, <0x0 0xff925000 0x0 0x100>;
2020 interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH 0>;
2024 #iommu-cells = <0>;
2047 reg = <0x0 0xff940000 0x0 0x20000>;
2048 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH 0>;
2058 #sound-dai-cells = <0>;
2060 pinctrl-0 = <&hdmi_i2c_xfer>;
2066 #size-cells = <0>;
2068 hdmi_in_vopb: endpoint@0 {
2069 reg = <0>;
2082 reg = <0x0 0xff960000 0x0 0x8000>;
2083 interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH 0>;
2092 #size-cells = <0>;
2097 #size-cells = <0>;
2099 port@0 {
2100 reg = <0>;
2102 #size-cells = <0>;
2104 dsi_in_vopb: endpoint@0 {
2105 reg = <0>;
2118 reg = <0x0 0xff968000 0x0 0x8000>;
2119 interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH 0>;
2128 #size-cells = <0>;
2133 #size-cells = <0>;
2135 port@0 {
2136 reg = <0>;
2138 #size-cells = <0>;
2140 dsi1_in_vopb: endpoint@0 {
2141 reg = <0>;
2155 reg = <0x0 0xff968000 0x0 0x8000>;
2169 reg = <0x0 0xff970000 0x0 0x8000>;
2170 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH 0>;
2174 pinctrl-0 = <&edp_hpd>;
2183 #size-cells = <0>;
2184 edp_in: port@0 {
2185 reg = <0>;
2187 #size-cells = <0>;
2189 edp_in_vopb: endpoint@0 {
2190 reg = <0>;
2207 reg = <0x0 0xff9a0000 0x0 0x10000>;
2208 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH 0>,
2209 <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH 0>,
2210 <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH 0>;
2232 reg = <0x0 0xffa86000 0x0 0x400>;
2237 reg = <0x0 0xffa86400 0x0 0x400>;
2242 reg = <0x0 0xffa86800 0x0 0x400>;
2247 reg = <0x0 0xffa86c00 0x0 0x400>;
2252 reg = <0x0 0xffa87000 0x0 0x400>;
2257 reg = <0x0 0xffa87400 0x0 0x400>;
2262 reg = <0x0 0xffa87800 0x0 0x400>;
2267 reg = <0x0 0xffa8e000 0x0 0x400>;
2272 reg = <0x0 0xffa8e400 0x0 0x400>;
2277 reg = <0x0 0xffa8e800 0x0 0x400>;
2282 reg = <0x0 0xffa8ec00 0x0 0x400>;
2287 reg = <0x0 0xffa8f000 0x0 0x400>;
2292 reg = <0x0 0xffa8f400 0x0 0x400>;
2297 reg = <0x0 0xffa8f800 0x0 0x400>;
2317 reg = <0x0 0xff720000 0x0 0x100>;
2319 interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH 0>;
2322 #gpio-cells = <0x2>;
2325 #interrupt-cells = <0x2>;
2330 reg = <0x0 0xff730000 0x0 0x100>;
2332 interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH 0>;
2335 #gpio-cells = <0x2>;
2338 #interrupt-cells = <0x2>;
2343 reg = <0x0 0xff780000 0x0 0x100>;
2345 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH 0>;
2348 #gpio-cells = <0x2>;
2351 #interrupt-cells = <0x2>;
2356 reg = <0x0 0xff788000 0x0 0x100>;
2358 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH 0>;
2361 #gpio-cells = <0x2>;
2364 #interrupt-cells = <0x2>;
2369 reg = <0x0 0xff790000 0x0 0x100>;
2371 interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH 0>;
2374 #gpio-cells = <0x2>;
2377 #interrupt-cells = <0x2>;
2477 rockchip,pins = <0 RK_PA0 2 &pcfg_pull_none>;
2708 <0 RK_PA3 1 &pcfg_pull_up>;
2713 <0 RK_PA4 1 &pcfg_pull_up>;
2743 <0 RK_PA7 1 &pcfg_pull_up>;
2748 <0 RK_PB0 1 &pcfg_pull_up>;
2758 rockchip,pins = <0 RK_PA1 1 &pcfg_pull_none>;
2895 <0 RK_PA0 1 &pcfg_pull_none>;
2905 <0 RK_PB0 3 &pcfg_pull_none>;
3052 <0 RK_PA6 1 &pcfg_pull_none>;
3057 <0 RK_PA6 1 &pcfg_pull_down>;
3103 rockchip,sleep-debug-en = <0>;
3104 rockchip,virtual-poweroff = <0>;
3106 (0
3117 (0