Lines Matching +full:0 +full:xff660000
43 #address-cells = <0x2>;
44 #size-cells = <0x0>;
78 cpu_l0: cpu@0 {
81 reg = <0x0 0x0>;
89 reg = <0x0 0x1>;
97 reg = <0x0 0x2>;
105 reg = <0x0 0x3>;
113 reg = <0x0 0x100>;
121 reg = <0x0 0x101>;
129 reg = <0x0 0x102>;
137 reg = <0x0 0x103>;
151 reg = <0x0 0xff250000 0x0 0x4000>;
163 reg = <0x0 0xff600000 0x0 0x4000>;
164 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
210 #clock-cells = <0>;
215 reg = <0x0 0xff0c0000 0x0 0x4000>;
220 fifo-depth = <0x100>;
229 reg = <0x0 0xff0d0000 0x0 0x4000>;
234 fifo-depth = <0x100>;
243 reg = <0x0 0xff0f0000 0x0 0x4000>;
248 fifo-depth = <0x100>;
257 reg = <0x0 0xff100000 0x0 0x100>;
269 reg = <0x0 0xff110000 0x0 0x1000>;
274 pinctrl-0 = <&spi0_clk &spi0_tx &spi0_rx &spi0_cs0>;
276 #size-cells = <0>;
282 reg = <0x0 0xff120000 0x0 0x1000>;
287 pinctrl-0 = <&spi1_clk &spi1_tx &spi1_rx &spi1_cs0>;
289 #size-cells = <0>;
295 reg = <0x0 0xff130000 0x0 0x1000>;
300 pinctrl-0 = <&spi2_clk &spi2_tx &spi2_rx &spi2_cs0>;
302 #size-cells = <0>;
308 reg = <0x0 0xff140000 0x0 0x1000>;
311 #size-cells = <0>;
315 pinctrl-0 = <&i2c2_xfer>;
321 reg = <0x0 0xff150000 0x0 0x1000>;
324 #size-cells = <0>;
328 pinctrl-0 = <&i2c3_xfer>;
334 reg = <0x0 0xff160000 0x0 0x1000>;
337 #size-cells = <0>;
341 pinctrl-0 = <&i2c4_xfer>;
347 reg = <0x0 0xff170000 0x0 0x1000>;
350 #size-cells = <0>;
354 pinctrl-0 = <&i2c5_xfer>;
360 reg = <0x0 0xff180000 0x0 0x100>;
372 reg = <0x0 0xff190000 0x0 0x100>;
384 reg = <0x0 0xff1b0000 0x0 0x100>;
396 reg = <0x0 0xff1c0000 0x0 0x100>;
411 thermal-sensors = <&tsadc 0>;
485 reg = <0x0 0xff280000 0x0 0x100>;
492 pinctrl-0 = <&otp_pin>;
502 reg = <0x0 0xff290000 0x0 0x10000>;
519 reg = <0x0 0xff500000 0x0 0x100>;
528 reg = <0x0 0xff580000 0x0 0x40000>;
541 reg = <0x0 0xff650000 0x0 0x1000>;
546 pinctrl-0 = <&i2c0_xfer>;
548 #size-cells = <0>;
554 reg = <0x0 0xff660000 0x0 0x1000>;
557 #size-cells = <0>;
561 pinctrl-0 = <&i2c1_xfer>;
567 reg = <0x0 0xff680000 0x0 0x10>;
570 pinctrl-0 = <&pwm0_pin>;
578 reg = <0x0 0xff680010 0x0 0x10>;
581 pinctrl-0 = <&pwm1_pin>;
589 reg = <0x0 0xff680020 0x0 0x10>;
598 reg = <0x0 0xff680030 0x0 0x10>;
601 pinctrl-0 = <&pwm3_pin>;
609 reg = <0x0 0xff690000 0x0 0x100>;
614 pinctrl-0 = <&uart2_xfer>;
622 reg = <0x0 0xff6b0000 0x0 0x1000>;
635 reg = <0x0 0xff738000 0x0 0x1000>;
644 offset = <0x200>;
654 reg = <0x0 0xff760000 0x0 0x1000>;
662 reg = <0x0 0xff770000 0x0 0x1000>;
672 reg = <0x0 0xff800000 0x0 0x100>;
680 reg = <0x0 0xff810000 0x0 0x20>;
686 reg = <0x0 0xff880000 0x0 0x1000>;
693 pinctrl-0 = <&spdif_tx>;
699 reg = <0x0 0xff890000 0x0 0x1000>;
710 reg = <0x0 0xff898000 0x0 0x1000>;
714 dmas = <&dmac_bus 0>, <&dmac_bus 1>;
717 pinctrl-0 = <&i2s_8ch_bus>;
723 reg = <0x0 0xff900800 0x0 0x100>;
728 #iommu-cells = <0>;
734 reg = <0x0 0xff914000 0x0 0x100>,
735 <0x0 0xff915000 0x0 0x100>;
740 #iommu-cells = <0>;
747 reg = <0x0 0xff930300 0x0 0x100>;
752 #iommu-cells = <0>;
758 reg = <0x0 0xff9a0440 0x0 0x40>,
759 <0x0 0xff9a0480 0x0 0x40>;
764 #iommu-cells = <0>;
770 reg = <0x0 0xff9a0800 0x0 0x100>;
776 #iommu-cells = <0>;
782 reg = <0x0 0xffb00000 0x0 0x20>;
789 reg = <0x17 0x1>;
792 reg = <0x1f 0x1>;
800 #address-cells = <0>;
802 reg = <0x0 0xffb71000 0x0 0x1000>,
803 <0x0 0xffb72000 0x0 0x2000>,
804 <0x0 0xffb74000 0x0 0x2000>,
805 <0x0 0xffb76000 0x0 0x2000>;
814 #address-cells = <0x2>;
815 #size-cells = <0x2>;
820 reg = <0x0 0xff750000 0x0 0x100>;
822 interrupts = <GIC_SPI 0x51 IRQ_TYPE_LEVEL_HIGH>;
825 #gpio-cells = <0x2>;
828 #interrupt-cells = <0x2>;
833 reg = <0x0 0xff780000 0x0 0x100>;
835 interrupts = <GIC_SPI 0x52 IRQ_TYPE_LEVEL_HIGH>;
838 #gpio-cells = <0x2>;
841 #interrupt-cells = <0x2>;
846 reg = <0x0 0xff790000 0x0 0x100>;
848 interrupts = <GIC_SPI 0x53 IRQ_TYPE_LEVEL_HIGH>;
851 #gpio-cells = <0x2>;
854 #interrupt-cells = <0x2>;
859 reg = <0x0 0xff7a0000 0x0 0x100>;
861 interrupts = <GIC_SPI 0x54 IRQ_TYPE_LEVEL_HIGH>;
864 #gpio-cells = <0x2>;
867 #interrupt-cells = <0x2>;
958 rockchip,pins = <0 RK_PA6 1 &pcfg_pull_none>,
959 <0 RK_PA7 1 &pcfg_pull_none>;
972 rockchip,pins = <0 RK_PB1 2 &pcfg_pull_none>,
1028 rockchip,pins = <0 RK_PB0 2 &pcfg_pull_none>;
1032 rockchip,pins = <0 RK_PB0 2 &pcfg_pull_down>;
1156 rockchip,pins = <0 RK_PB4 2 &pcfg_pull_up>;
1159 rockchip,pins = <0 RK_PB5 2 &pcfg_pull_up>;
1162 rockchip,pins = <0 RK_PB2 2 &pcfg_pull_up>;
1165 rockchip,pins = <0 RK_PB3 2 &pcfg_pull_up>;
1171 rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
1175 rockchip,pins = <0 RK_PA3 1 &pcfg_pull_none>;
1196 rockchip,pins = <0 RK_PC4 3 &pcfg_pull_up>,
1197 <0 RK_PC5 3 &pcfg_pull_none>;
1201 rockchip,pins = <0 RK_PC6 3 &pcfg_pull_none>;
1205 rockchip,pins = <0 RK_PC7 3 &pcfg_pull_none>;
1234 rockchip,pins = <0 RK_PD3 3 &pcfg_pull_up>,
1235 <0 RK_PD2 3 &pcfg_pull_none>;
1239 rockchip,pins = <0 RK_PD0 3 &pcfg_pull_none>;
1243 rockchip,pins = <0 RK_PD1 3 &pcfg_pull_none>;