Lines Matching +full:1 +full:e40000
117 qcom,client-id = <1>;
292 qcom,freq-domain = <&cpufreq_hw 1>;
314 qcom,freq-domain = <&cpufreq_hw 1>;
336 qcom,freq-domain = <&cpufreq_hw 1>;
358 qcom,freq-domain = <&cpufreq_hw 1>;
419 LITTLE_CPU_SLEEP_1: cpu-sleep-0-1 {
429 BIG_CPU_SLEEP_0: cpu-sleep-1-0 {
439 BIG_CPU_SLEEP_1: cpu-sleep-1-1 {
728 interrupts = <GIC_PPI 1 IRQ_TYPE_LEVEL_LOW>,
760 <&adsp_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
786 #address-cells = <1>;
802 #address-cells = <1>;
804 #sound-dai-cells = <1>;
814 #address-cells = <1>;
816 #sound-dai-cells = <1>;
836 #address-cells = <1>;
859 <&cdsp_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
884 #address-cells = <1>;
887 compute-cb@1 {
889 reg = <1>;
941 #hwlock-cells = <1>;
963 #qcom,smem-state-cells = <1>;
987 #qcom,smem-state-cells = <1>;
1004 qcom,remote-pid = <1>;
1008 #qcom,smem-state-cells = <1>;
1019 #qcom,smem-state-cells = <1>;
1039 #qcom,smem-state-cells = <1>;
1064 #clock-cells = <1>;
1065 #reset-cells = <1>;
1066 #power-domain-cells = <1>;
1072 #address-cells = <1>;
1073 #size-cells = <1>;
1075 qusb2p_hstx_trim: hstx-trim-primary@1eb {
1077 bits = <1 4>;
1080 qusb2s_hstx_trim: hstx-trim-secondary@1eb {
1136 #address-cells = <1>;
1151 #address-cells = <1>;
1177 #address-cells = <1>;
1192 #address-cells = <1>;
1218 #address-cells = <1>;
1233 #address-cells = <1>;
1259 #address-cells = <1>;
1274 #address-cells = <1>;
1300 #address-cells = <1>;
1315 #address-cells = <1>;
1341 #address-cells = <1>;
1356 #address-cells = <1>;
1382 #address-cells = <1>;
1397 #address-cells = <1>;
1423 #address-cells = <1>;
1438 #address-cells = <1>;
1476 #address-cells = <1>;
1491 #address-cells = <1>;
1517 #address-cells = <1>;
1532 #address-cells = <1>;
1558 #address-cells = <1>;
1573 #address-cells = <1>;
1599 #address-cells = <1>;
1614 #address-cells = <1>;
1640 #address-cells = <1>;
1655 #address-cells = <1>;
1681 #address-cells = <1>;
1696 #address-cells = <1>;
1722 #address-cells = <1>;
1737 #address-cells = <1>;
1763 #address-cells = <1>;
1778 #address-cells = <1>;
1804 pcie0: pci@1c00000 {
1814 num-lanes = <1>;
1824 #interrupt-cells = <1>;
1826 interrupt-map = <0 0 0 1 &intc 0 149 IRQ_TYPE_LEVEL_HIGH>, /* int_a */
1875 pcie0_phy: phy@1c06000 {
1895 pcie0_lane: lanes@1c06200 {
1908 pcie1: pci@1c08000 {
1916 linux,pci-domain = <1>;
1918 num-lanes = <1>;
1928 #interrupt-cells = <1>;
1930 interrupt-map = <0 0 0 1 &intc 0 434 IRQ_TYPE_LEVEL_HIGH>, /* int_a */
1984 pcie1_phy: phy@1c0a000 {
2004 pcie1_lane: lanes@1c06200 {
2065 ufs_mem_hc: ufshc@1d84000 {
2076 #reset-cells = <1>;
2116 ufs_mem_phy: phy@1d87000 {
2131 ufs_mem_phy_lanes: lanes@1d87400 {
2141 ipa: ipa@1e40000 {
2156 <&ipa_smp2p_in 1 IRQ_TYPE_EDGE_RISING>;
2173 <&ipa_smp2p_out 1>;
2182 tcsr_mutex_regs: syscon@1f40000 {
2766 <&modem_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
2811 qcom,remote-pid = <1>;
2819 #clock-cells = <1>;
2820 #reset-cells = <1>;
2821 #power-domain-cells = <1>;
2866 #address-cells = <1>;
2895 #address-cells = <1>;
2924 #address-cells = <1>;
2986 #address-cells = <1>;
2989 port@1 {
2990 reg = <1>;
3194 #address-cells = <1>;
3205 port@1 {
3206 reg = <1>;
3358 #address-cells = <1>;
3382 #address-cells = <1>;
3385 ngd@1 {
3386 reg = <1>;
3395 wcd9340: codec@1{
3397 reg = <1 0>;
3400 #sound-dai-cells = <1>;
3404 #interrupt-cells = <1>;
3414 #address-cells = <1>;
3415 #size-cells = <1>;
3435 #sound-dai-cells = <1>;
3486 #clock-cells = <1>;
3519 #clock-cells = <1>;
3714 #clock-cells = <1>;
3715 #power-domain-cells = <1>;
3716 #reset-cells = <1>;
3721 #address-cells = <1>;
3747 pinctrl-1 = <&cci0_sleep &cci1_sleep>;
3754 #address-cells = <1>;
3758 cci_i2c1: i2c-bus@1 {
3759 reg = <1>;
3761 #address-cells = <1>;
3769 #clock-cells = <1>;
3770 #reset-cells = <1>;
3771 #power-domain-cells = <1>;
3820 #interrupt-cells = <1>;
3860 #address-cells = <1>;
3870 port@1 {
3871 reg = <1>;
3932 #address-cells = <1>;
3942 port@1 {
3943 reg = <1>;
3959 #clock-cells = <1>;
3998 #address-cells = <1>;
4008 port@1 {
4009 reg = <1>;
4025 #clock-cells = <1>;
4109 #iommu-cells = <1>;
4176 <&dsi0_phy 1>,
4178 <&dsi1_phy 1>,
4190 #clock-cells = <1>;
4191 #reset-cells = <1>;
4192 #power-domain-cells = <1>;
4207 #reset-cells = <1>;
4218 #thermal-sensor-cells = <1>;
4229 #thermal-sensor-cells = <1>;
4235 #reset-cells = <1>;
4245 #power-domain-cells = <1>;
4279 #address-cells = <1>;
4280 #size-cells = <1>;
4294 #global-interrupts = <1>;
4366 #clock-cells = <1>;
4386 #mbox-cells = <1>;
4395 reg-names = "drv-0", "drv-1", "drv-2";
4404 <CONTROL_TCS 1>;
4412 #clock-cells = <1>;
4419 #power-domain-cells = <1>;
4482 #msi-cells = <1>;
4494 #dma-cells = <1>;
4495 qcom,ee = <1>;
4516 frame-number = <1>;
4565 #interconnect-cells = <1>;
4576 #freq-domain-cells = <1>;
4609 thermal-sensors = <&tsens0 1>;
5061 thermal-sensors = <&tsens1 1>;