dts/qcom/sc7180.dtsi

116 			qcom,client-id = <1>;
275 			qcom,freq-domain = <&cpufreq_hw 1>;
297 			qcom,freq-domain = <&cpufreq_hw 1>;
353 			LITTLE_CPU_SLEEP_1: cpu-sleep-0-1 {
363 			BIG_CPU_SLEEP_0: cpu-sleep-1-0 {
373 			BIG_CPU_SLEEP_1: cpu-sleep-1-1 {
550 		#hwlock-cells = <1>;
572 			#qcom,smem-state-cells = <1>;
596 			#qcom,smem-state-cells = <1>;
613 		qcom,remote-pid = <1>;
617 			#qcom,smem-state-cells = <1>;
628 			#qcom,smem-state-cells = <1>;
657 			#clock-cells = <1>;
658 			#reset-cells = <1>;
659 			#power-domain-cells = <1>;
671 			#address-cells = <1>;
672 			#size-cells = <1>;
676 				bits = <1 3>;
704 			mmc-ddr-1_8v;
705 			mmc-hs200-1_8v;
706 			mmc-hs400-1_8v;
771 				#address-cells = <1>;
789 				#address-cells = <1>;
823 				#address-cells = <1>;
841 				#address-cells = <1>;
875 				#address-cells = <1>;
909 				#address-cells = <1>;
927 				#address-cells = <1>;
961 				#address-cells = <1>;
995 				#address-cells = <1>;
1013 				#address-cells = <1>;
1062 				#address-cells = <1>;
1080 				#address-cells = <1>;
1114 				#address-cells = <1>;
1148 				#address-cells = <1>;
1166 				#address-cells = <1>;
1200 				#address-cells = <1>;
1234 				#address-cells = <1>;
1252 				#address-cells = <1>;
1286 				#address-cells = <1>;
1304 				#address-cells = <1>;
1387 		ipa_virt: interconnect@1e00000 {
1394 		ipa: ipa@1e40000 {
1409 					      <&ipa_smp2p_in 1 IRQ_TYPE_EDGE_RISING>;
1426 					   <&ipa_smp2p_out 1>;
1435 		tcsr_mutex_regs: syscon@1f40000 {
1440 		tcsr_regs: syscon@1fc0000 {
1856 					      <&modem_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
1895 				qcom,remote-pid = <1>;
1964 			#iommu-cells = <1>;
2021 			#clock-cells = <1>;
2022 			#reset-cells = <1>;
2023 			#power-domain-cells = <1>;
2060 				#address-cells = <1>;
2088 				#address-cells = <1>;
2116 				#address-cells = <1>;
2126 				port@1 {
2127 					reg = <1>;
2193 				#address-cells = <1>;
2430 				#address-cells = <1>;
2440 				port@1 {
2441 					reg = <1>;
2579 			#address-cells = <1>;
2612 			#clock-cells = <1>;
2784 			#clock-cells = <1>;
2785 			#reset-cells = <1>;
2786 			#power-domain-cells = <1>;
2813 			#interrupt-cells = <1>;
2857 					#address-cells = <1>;
2921 				#address-cells = <1>;
2927 					#address-cells = <1>;
2937 					port@1 {
2938 						reg = <1>;
2973 				#clock-cells = <1>;
2990 				 <&dsi_phy 1>,
2999 			#clock-cells = <1>;
3000 			#reset-cells = <1>;
3001 			#power-domain-cells = <1>;
3007 			qcom,pdc-ranges = <0 480 94>, <94 609 31>, <125 63 1>;
3016 			#reset-cells = <1>;
3027 			#thermal-sensor-cells = <1>;
3038 			#thermal-sensor-cells = <1>;
3044 			#reset-cells = <1>;
3054 			#power-domain-cells = <1>;
3066 			interrupts-extended = <&pdc 1 IRQ_TYPE_LEVEL_HIGH>;
3069 			#address-cells = <1>;
3070 			#size-cells = <1>;
3080 			#global-interrupts = <1>;
3178 				#msi-cells = <1>;
3187 			#mbox-cells = <1>;
3212 				frame-number = <1>;
3259 			reg-names = "drv-0", "drv-1", "drv-2";
3268 					  <CONTROL_TCS 1>;
3274 				#clock-cells = <1>;
3279 				#power-domain-cells = <1>;
3343 			#interconnect-cells = <1>;
3354 			#freq-domain-cells = <1>;
3389 			#clock-cells = <1>;
3390 			#power-domain-cells = <1>;
3399 			#clock-cells = <1>;
3400 			#power-domain-cells = <1>;
3409 			thermal-sensors = <&tsens0 1>;
3991 			thermal-sensors = <&tsens1 1>;
4179 		interrupts = <GIC_PPI 1 IRQ_TYPE_LEVEL_LOW>,