dts/qcom/msm8998.dtsi

57 			qcom,client-id = <1>;
150 		CPU1: cpu@1 {
310 			LITTLE_CPU_SLEEP_1: cpu-sleep-0-1 {
321 			BIG_CPU_SLEEP_0: cpu-sleep-1-0 {
331 			BIG_CPU_SLEEP_1: cpu-sleep-1-1 {
353 		#hwlock-cells = <1>;
374 				#clock-cells = <1>;
379 				#power-domain-cells = <1>;
448 			#qcom,smem-state-cells = <1>;
465 		qcom,remote-pid = <1>;
469 			#qcom,smem-state-cells = <1>;
489 			#qcom,smem-state-cells = <1>;
504 			thermal-sensors = <&tsens0 1>;
747 			thermal-sensors = <&tsens1 1>;
836 		interrupts = <GIC_PPI 1 IRQ_TYPE_LEVEL_LOW>,
843 		#address-cells = <1>;
844 		#size-cells = <1>;
850 			#clock-cells = <1>;
851 			#reset-cells = <1>;
852 			#power-domain-cells = <1>;
864 			#address-cells = <1>;
865 			#size-cells = <1>;
881 			#thermal-sensor-cells = <1>;
892 			#thermal-sensor-cells = <1>;
898 			#iommu-cells = <1>;
913 			#iommu-cells = <1>;
929 		pcie0: pci@1c00000 {
941 			num-lanes = <1>;
948 			#interrupt-cells = <1>;
952 			interrupt-map =	<0 0 0 1 &intc 0 135 IRQ_TYPE_LEVEL_HIGH>,
965 			iommu-map = <0x100 &anoc1_smmu 0x1480 1>;
969 		phy@1c06000 {
972 			#address-cells = <1>;
973 			#size-cells = <1>;
987 			pciephy: lane@1c06800 {
998 		ufshc: ufshc@1da4000 {
1006 			#reset-cells = <1>;
1040 		ufsphy: phy@1da7000 {
1043 			#address-cells = <1>;
1044 			#size-cells = <1>;
1057 			ufsphy_lanes: lanes@1da7400 {
1067 		tcsr_mutex_regs: syscon@1f40000 {
1090 				<&modem_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
1132 				qcom,remote-pid = <1>;
1139 			#clock-cells = <1>;
1140 			#reset-cells = <1>;
1141 			#power-domain-cells = <1>;
1156 					      <&slpi_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
1223 				#address-cells = <1>;
1253 				#address-cells = <1>;
1284 				#address-cells = <1>;
1295 				port@1 {
1296 					reg = <1>;
1474 				#address-cells = <1>;
1485 				port@1 {
1486 					reg = <1>;
1604 		etm7: etm@7e40000 {
1661 			#address-cells = <1>;
1662 			#size-cells = <1>;
1702 			#clock-cells = <1>;
1703 			#address-cells = <1>;
1704 			#size-cells = <1>;
1767 			#dma-cells = <1>;
1799 			#address-cells = <1>;
1814 			#address-cells = <1>;
1829 			#address-cells = <1>;
1844 			#address-cells = <1>;
1859 			#address-cells = <1>;
1874 			#address-cells = <1>;
1899 			#address-cells = <1>;
1914 			#address-cells = <1>;
1929 			#address-cells = <1>;
1944 			#address-cells = <1>;
1959 			#address-cells = <1>;
1974 			#address-cells = <1>;
1984 					      <&adsp_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
2015 			#mbox-cells = <1>;
2019 			#address-cells = <1>;
2020 			#size-cells = <1>;
2034 				frame-number = <1>;
2081 			#address-cells = <1>;
2082 			#size-cells = <1>;
2085 			#redistributor-regions = <1>;