Lines Matching +full:1 +full:f200000
53 CPU1: cpu@1 {
133 #hwlock-cells = <1>;
199 qcom,client-id = <1>;
203 zap_shader_region: gpu@8f200000 {
225 #clock-cells = <1>;
230 #power-domain-cells = <1>;
237 opp-level = <1>;
283 #qcom,smem-state-cells = <1>;
303 qcom,remote-pid = <1>;
307 #qcom,smem-state-cells = <1>;
337 #qcom,smem-state-cells = <1>;
342 #address-cells = <1>;
343 #size-cells = <1>;
350 #clock-cells = <1>;
351 #address-cells = <1>;
352 #size-cells = <1>;
414 #address-cells = <1>;
415 #size-cells = <1>;
424 bits = <1 4>;
442 #clock-cells = <1>;
443 #reset-cells = <1>;
444 #power-domain-cells = <1>;
459 #thermal-sensor-cells = <1>;
470 #thermal-sensor-cells = <1>;
485 #clock-cells = <1>;
486 #reset-cells = <1>;
487 #power-domain-cells = <1>;
515 #interrupt-cells = <1>;
520 #address-cells = <1>;
521 #size-cells = <1>;
546 #address-cells = <1>;
584 #sound-dai-cells = <1>;
587 #address-cells = <1>;
655 * bin (1 << 0). All the rest are available on
725 #address-cells = <1>;
726 #size-cells = <1>;
734 num-lanes = <1>;
752 #interrupt-cells = <1>;
754 interrupt-map = <0 0 0 1 &intc 0 244 IRQ_TYPE_LEVEL_HIGH>, /* int_a */
761 pinctrl-1 = <&pcie0_clkreq_sleep &pcie0_perst_default &pcie0_wake_sleep>;
783 num-lanes = <1>;
804 #interrupt-cells = <1>;
806 interrupt-map = <0 0 0 1 &intc 0 272 IRQ_TYPE_LEVEL_HIGH>, /* int_a */
813 pinctrl-1 = <&pcie1_clkreq_sleep &pcie1_perst_default &pcie1_wake_sleep>;
815 linux,pci-domain = <1>;
834 num-lanes = <1>;
855 #interrupt-cells = <1>;
857 interrupt-map = <0 0 0 1 &intc 0 142 IRQ_TYPE_LEVEL_HIGH>, /* int_a */
864 pinctrl-1 = <&pcie2_clkreq_sleep &pcie2_perst_default &pcie2_wake_sleep >;
928 lanes-per-direction = <1>;
929 #reset-cells = <1>;
940 #address-cells = <1>;
941 #size-cells = <1>;
1084 <&vfe_smmu 1>,
1089 #address-cells = <1>;
1096 #address-cells = <1>;
1119 #address-cells = <1>;
1123 cci_i2c1: i2c-bus@1 {
1124 reg = <1>;
1126 #address-cells = <1>;
1135 #global-interrupts = <1>;
1139 #iommu-cells = <1>;
1200 #global-interrupts = <1>;
1204 #iommu-cells = <1>;
1215 #global-interrupts = <1>;
1228 #iommu-cells = <1>;
1236 #global-interrupts = <1>;
1245 #iommu-cells = <1>;
1251 #iommu-cells = <1>;
1254 #global-interrupts = <1>;
1318 #address-cells = <1>;
1348 #address-cells = <1>;
1396 #address-cells = <1>;
1407 port@1 {
1408 reg = <1>;
1451 #address-cells = <1>;
1462 port@1 {
1463 reg = <1>;
1582 #address-cells = <1>;
1592 port@1 {
1593 reg = <1>;
1668 funnel@3bb0000 { /* APSS Funnel 1 */
1676 #address-cells = <1>;
1686 port@1 {
1687 reg = <1>;
1712 #address-cells = <1>;
1723 port@1 {
1724 reg = <1>;
1744 #clock-cells = <1>;
1750 #address-cells = <1>;
1751 #size-cells = <1>;
1782 #clock-cells = <1>;
1783 #address-cells = <1>;
1784 #size-cells = <1>;
1873 pinctrl-1 = <&blsp1_spi0_sleep>;
1874 #address-cells = <1>;
1888 pinctrl-1 = <&blsp1_i2c2_sleep>;
1889 #address-cells = <1>;
1923 pinctrl-1 = <&blsp2_i2c0_sleep>;
1924 #address-cells = <1>;
1938 pinctrl-1 = <&blsp2_i2c1_sleep>;
1939 #address-cells = <1>;
1953 pinctrl-1 = <&blsp2_spi5_sleep>;
1954 #address-cells = <1>;
1962 #address-cells = <1>;
1963 #size-cells = <1>;
1996 #dma-cells = <1>;
1997 qcom,ee = <1>;
2009 #address-cells = <1>;
2011 ngd@1 {
2012 reg = <1>;
2013 #address-cells = <1>;
2014 #size-cells = <1>;
2017 compatible = "slim217,1a0";
2021 wcd9335: codec@1{
2025 compatible = "slim217,1a0";
2026 reg = <1 0>;
2033 #interrupt-cells = <1>;
2038 #sound-dai-cells = <1>;
2049 <&smp2p_adsp_in 1 IRQ_TYPE_EDGE_RISING>,
2068 qcom,smd-edge = <1>;
2070 #address-cells = <1>;
2077 #address-cells = <1>;
2090 #address-cells = <1>;
2092 #sound-dai-cells = <1>;
2093 hdmi@1 {
2094 reg = <1>;
2104 #address-cells = <1>;
2106 #sound-dai-cells = <1>;
2107 iommus = <&lpass_q6_smmu 1>;
2128 #mbox-cells = <1>;
2132 #address-cells = <1>;
2133 #size-cells = <1>;
2148 frame-number = <1>;
2199 #redistributor-regions = <1>;
2329 thermal-sensors = <&tsens0 1>;
2389 thermal-sensors = <&tsens1 1>;