dts/qcom/msm8994.dtsi

19 			#clock-cells = <0>;
26 			#clock-cells = <0>;
34 		#size-cells = <0>;
36 		CPU0: cpu@0 {
39 			reg = <0x0 0x0>;
51 			reg = <0x0 0x1>;
59 			reg = <0x0 0x2>;
67 			reg = <0x0 0x3>;
75 			reg = <0x0 0x100>;
87 			reg = <0x0 0x101>;
95 			reg = <0x0 0x102>;
103 			reg = <0x0 0x103>;
156 		reg = <0 0 0 0>;
175 			reg = <0x0 0x6a00000 0x0 0x200000>;
184 			qcom,ipc = <&apcs 8 0>;
186 			qcom,local-pid = <0>;
212 		ranges = <0 0 0 0xffffffff>;
219 			reg = <0xf9000000 0x1000>,
220 			      <0xf9002000 0x1000>;
225 			reg = <0xf900d000 0x2000>;
234 			reg = <0xf9020000 0x1000>;
237 				frame-number = <0>;
240 				reg = <0xf9021000 0x1000>,
241 				      <0xf9022000 0x1000>;
247 				reg = <0xf9023000 0x1000>;
254 				reg = <0xf9024000 0x1000>;
261 				reg = <0xf9025000 0x1000>;
268 				reg = <0xf9026000 0x1000>;
275 				reg = <0xf9027000 0x1000>;
282 				reg = <0xf9028000 0x1000>;
289 			reg = <0xf9824900 0x1a0>, <0xf9824000 0x800>;
302 			pinctrl-0 = <&sdc1_clk_on &sdc1_cmd_on &sdc1_data_on &sdc1_rclk_on>;
312 			reg = <0xf9904000 0x19000>;
317 			qcom,ee = <0>;
325 			reg = <0xf991e000 0x1000>;
331 			pinctrl-0 = <&blsp1_uart2_default>;
338 			reg = <0xf9923000 0x500>;
345 			pinctrl-0 = <&i2c1_default>;
348 			#size-cells = <0>;
354 			reg = <0xf9923000 0x500>;
363 			pinctrl-0 = <&blsp1_spi0_default>;
366 			#size-cells = <0>;
372 			reg = <0xf9924000 0x500>;
381 			pinctrl-0 = <&i2c2_default>;
384 			#size-cells = <0>;
392 			reg = <0xf9926000 0x500>;
399 			pinctrl-0 = <&i2c4_default>;
402 			#size-cells = <0>;
408 			reg = <0xf9944000 0x19000>;
413 			qcom,ee = <0>;
425 			reg = <0xf9928000 0x500>;
434 			pinctrl-0 = <&i2c6_default>;
437 			#size-cells = <0>;
443 			reg = <0xf995e000 0x1000>;
451 			pinctrl-0 = <&blsp2_uart2_default>;
458 			reg = <0xf9967000 0x500>;
467 			pinctrl-0 = <&i2c5_default>;
470 			#size-cells = <0>;
479 			reg = <0xfc400000 0x2000>;
484 			reg = <0xfc428000 0x4000>;
489 			reg = <0xfc4ab000 0x4>;
494 			reg = <0xfc4cf000 0x1000>,
495 			      <0xfc4cb000 0x1000>,
496 			      <0xfc4ca000 0x1000>;
500 			qcom,ee = <0>;
501 			qcom,channel = <0>;
503 			#size-cells = <0>;
510 			reg = <0xfd484000 0x2000>;
515 			reg = <0xfd510000 0x4000>;
518 			gpio-ranges = <&tlmm 0 0 146>;
693 		syscon = <&tcsr_mutex_regs 0 0x80>;
699 		interrupts = <GIC_PPI 2 0xff08>,
700 			     <GIC_PPI 3 0xff08>,
701 			     <GIC_PPI 4 0xff08>,
702 			     <GIC_PPI 1 0xff08>;