Lines Matching +full:0 +full:x1000
25 #size-cells = <0>;
58 cpu0: cpu@0 {
61 reg = <0x0 0x0>;
68 reg = <0x0 0x1>;
75 reg = <0x0 0x2>;
82 reg = <0x0 0x3>;
89 reg = <0x0 0x100>;
96 reg = <0x0 0x101>;
103 reg = <0x0 0x102>;
110 reg = <0x0 0x103>;
117 reg = <0x0 0xe82b1000 0 0x1000>, /* GICD */
118 <0x0 0xe82b2000 0 0x2000>, /* GICC */
119 <0x0 0xe82b4000 0 0x2000>, /* GICH */
120 <0x0 0xe82b6000 0 0x2000>; /* GICV */
122 #address-cells = <0>;
150 reg = <0x0 0xfff35000 0x0 0x1000>;
163 reg = <0x0 0xe8a09000 0x0 0x1000>;
169 reg = <0x0 0xfff34000 0x0 0x1000>;
175 reg = <0x0 0xfff0a000 0x0 0x1000>;
181 reg = <0x0 0xffd7e000 0x0 0x1000>;
187 reg = <0x0 0xe87ff000 0x0 0x1000>;
193 reg = <0x0 0xe8900000 0x0 0x1000>;
199 reg = <0x0 0xfdf02000 0x0 0x1000>;
205 pinctrl-0 = <&uart0_pmx_func &uart0_cfg_func>;
211 reg = <0x0 0xfdf00000 0x0 0x1000>;
222 reg = <0x0 0xfdf03000 0x0 0x1000>;
228 pinctrl-0 = <&uart2_pmx_func &uart2_cfg_func>;
234 reg = <0x0 0xffd74000 0x0 0x1000>;
240 pinctrl-0 = <&uart3_pmx_func &uart3_cfg_func>;
246 reg = <0x0 0xfdf01000 0x0 0x1000>;
252 pinctrl-0 = <&uart4_pmx_func &uart4_cfg_func>;
258 reg = <0x0 0xfdf05000 0x0 0x1000>;
269 reg = <0x0 0xfff32000 0x0 0x1000>;
275 pinctrl-0 = <&uart6_pmx_func &uart6_cfg_func>;
281 reg = <0x0 0xe8a0b000 0x0 0x1000>;
285 gpio-ranges = <&pmx0 1 0 1 &pmx0 3 1 5>;
294 reg = <0x0 0xe8a0c000 0x0 0x1000>;
306 reg = <0x0 0xe8a0d000 0x0 0x1000>;
319 reg = <0x0 0xe8a0e000 0x0 0x1000>;
323 gpio-ranges = <&pmx0 0 13 4 &pmx0 7 17 1>;
332 reg = <0x0 0xe8a0f000 0x0 0x1000>;
336 gpio-ranges = <&pmx0 0 18 8>;
345 reg = <0x0 0xe8a10000 0x0 0x1000>;
349 gpio-ranges = <&pmx0 0 26 8>;
358 reg = <0x0 0xe8a11000 0x0 0x1000>;
371 reg = <0x0 0xe8a12000 0x0 0x1000>;
375 gpio-ranges = <&pmx0 0 41 8>;
384 reg = <0x0 0xe8a13000 0x0 0x1000>;
388 gpio-ranges = <&pmx0 0 49 8>;
397 reg = <0x0 0xe8a14000 0x0 0x1000>;
401 gpio-ranges = <&pmx0 0 57 8>;
410 reg = <0x0 0xe8a15000 0x0 0x1000>;
414 gpio-ranges = <&pmx0 0 65 8>;
423 reg = <0x0 0xe8a16000 0x0 0x1000>;
427 gpio-ranges = <&pmx0 0 73 8>;
436 reg = <0x0 0xe8a17000 0x0 0x1000>;
440 gpio-ranges = <&pmx0 0 81 1>;
449 reg = <0x0 0xe8a18000 0x0 0x1000>;
461 reg = <0x0 0xe8a19000 0x0 0x1000>;
473 reg = <0x0 0xe8a1a000 0x0 0x1000>;
485 reg = <0x0 0xe8a1b000 0x0 0x1000>;
489 gpio-ranges = <&pmx5 0 0 8>;
498 reg = <0x0 0xe8a1c000 0x0 0x1000>;
502 gpio-ranges = <&pmx5 0 8 2>;
511 reg = <0x0 0xfff28000 0x0 0x1000>;
524 reg = <0x0 0xfff29000 0x0 0x1000>;
528 gpio-ranges = <&pmx1 0 61 2>;
537 reg = <0x0 0xe8a1f000 0x0 0x1000>;
541 gpio-ranges = <&pmx7 0 0 8>;
550 reg = <0x0 0xe8a20000 0x0 0x1000>;
554 gpio-ranges = <&pmx7 0 8 4>;
563 reg = <0x0 0xfff0b000 0x0 0x1000>;
568 gpio-ranges = <&pmx1 2 0 6>;
577 reg = <0x0 0xfff0c000 0x0 0x1000>;
582 gpio-ranges = <&pmx1 0 6 8>;
591 reg = <0x0 0xfff0d000 0x0 0x1000>;
596 gpio-ranges = <&pmx1 0 14 8>;
605 reg = <0x0 0xfff0e000 0x0 0x1000>;
610 gpio-ranges = <&pmx1 0 22 8>;
619 reg = <0x0 0xfff0f000 0x0 0x1000>;
624 gpio-ranges = <&pmx1 0 30 1>;
633 reg = <0x0 0xfff10000 0x0 0x1000>;
647 reg = <0x0 0xfff1d000 0x0 0x1000>;
661 /* 0: HCI standard */
663 reg = <0x0 0xff3c0000 0x0 0x1000>,
664 <0x0 0xff3e0000 0x0 0x1000>;
670 freq-table-hz = <0 0>, <0 0>;
671 /* offset: 0x84; bit: 12 */
672 resets = <&crg_rst 0x84 12>;
680 reg = <0x0 0xff37f000 0x0 0x1000>;
682 #size-cells = <0>;
688 resets = <&crg_rst 0x94 18>;
699 reg = <0x0 0xfc183000 0x0 0x1000>;
701 #size-cells = <0>;
707 resets = <&crg_rst 0x94 20>;