Lines Matching +full:0 +full:x140

30 			pinctrl-0 = <&pinctrl_led3>;
72 pinctrl-0 = <&pinctrl_espi2>;
76 eeprom@0 {
78 reg = <0>;
91 pinctrl-0 = <&pinctrl_i2c2>;
98 pinctrl-0 = <&pinctrl_i2c4>;
103 reg = <0x1a>;
115 0x0000 /* 0:Default */
116 0x0000 /* 1:Default */
117 0x0000 /* 2:FN_DMICCLK */
118 0x0000 /* 3:Default */
119 0x0000 /* 4:FN_DMICCDAT */
120 0x0000 /* 5:Default */
126 reg = <0x20>;
128 pinctrl-0 = <&pinctrl_pcal6414>;
137 reg = <0x21>;
147 pinctrl-0 = <&pinctrl_sai3>;
161 pinctrl-0 = <&pinctrl_uart2>;
167 pinctrl-0 = <&pinctrl_uart3>;
176 pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
187 MX8MM_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK 0x82
188 MX8MM_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI 0x82
189 MX8MM_IOMUXC_ECSPI2_MISO_ECSPI2_MISO 0x82
190 MX8MM_IOMUXC_ECSPI1_SS0_GPIO5_IO9 0x41
196 MX8MM_IOMUXC_I2C2_SCL_I2C2_SCL 0x400001c3
197 MX8MM_IOMUXC_I2C2_SDA_I2C2_SDA 0x400001c3
203 MX8MM_IOMUXC_I2C4_SCL_I2C4_SCL 0x400001c3
204 MX8MM_IOMUXC_I2C4_SDA_I2C4_SDA 0x400001c3
210 MX8MM_IOMUXC_SAI3_RXFS_GPIO4_IO28 0x41
216 MX8MM_IOMUXC_SAI2_MCLK_GPIO4_IO27 0x19
222 MX8MM_IOMUXC_SAI3_TXFS_SAI3_TX_SYNC 0xd6
223 MX8MM_IOMUXC_SAI3_TXC_SAI3_TX_BCLK 0xd6
224 MX8MM_IOMUXC_SAI3_MCLK_SAI3_MCLK 0xd6
225 MX8MM_IOMUXC_SAI3_TXD_SAI3_TX_DATA0 0xd6
226 MX8MM_IOMUXC_SAI3_RXD_SAI3_RX_DATA0 0xd6
232 MX8MM_IOMUXC_UART2_RXD_UART2_DCE_RX 0x140
233 MX8MM_IOMUXC_UART2_TXD_UART2_DCE_TX 0x140
239 MX8MM_IOMUXC_ECSPI1_SCLK_UART3_DCE_RX 0x40
240 MX8MM_IOMUXC_ECSPI1_MOSI_UART3_DCE_TX 0x40
241 MX8MM_IOMUXC_ECSPI1_MISO_UART3_DCE_CTS_B 0x40
242 MX8MM_IOMUXC_ECSPI1_SS0_UART3_DCE_RTS_B 0x40
248 MX8MM_IOMUXC_SD2_CD_B_USDHC2_CD_B 0x41
249 MX8MM_IOMUXC_SD2_RESET_B_GPIO2_IO19 0x41
255 MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x190
256 MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d0
257 MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d0
258 MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d0
259 MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d0
260 MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d0
261 MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0
267 MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x194
268 MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d4
269 MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d4
270 MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d4
271 MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d4
272 MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d4
273 MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0
279 MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x196
280 MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d6
281 MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d6
282 MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d6
283 MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d6
284 MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d6
285 MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0