dts/freescale/fsl-ls1088a.dtsi

28 		/* We have 2 clusters having 4 Cortex-A53 cores each */
261 				/* Calibration data group 4 */
282 			clocks = <&clockgen 4 1>;
290 			clocks = <&clockgen 4 3>;
298 			clocks = <&clockgen 4 3>;
363 			clocks = <&clockgen 4 7>;
373 			clocks = <&clockgen 4 7>;
383 			clocks = <&clockgen 4 7>;
393 			clocks = <&clockgen 4 7>;
406 			clocks = <&clockgen 4 3>, <&clockgen 4 3>;
419 			bus-width = <4>;
430 			snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
450 			clocks = <&clockgen 4 3>;
515 					<0000 0 0 4 &gic 0 0 0 112 IRQ_TYPE_LEVEL_HIGH>;
541 					<0000 0 0 4 &gic 0 0 0 117 IRQ_TYPE_LEVEL_HIGH>;
567 					<0000 0 0 4 &gic 0 0 0 122 IRQ_TYPE_LEVEL_HIGH>;
670 			clocks = <&clockgen 4 0>;
675 		cluster1_core0_watchdog: wdt@c000000 {
678 			clocks = <&clockgen 4 15>, <&clockgen 4 15>;
685 			clocks = <&clockgen 4 15>, <&clockgen 4 15>;
692 			clocks = <&clockgen 4 15>, <&clockgen 4 15>;
699 			clocks = <&clockgen 4 15>, <&clockgen 4 15>;
706 			clocks = <&clockgen 4 15>, <&clockgen 4 15>;
713 			clocks = <&clockgen 4 15>, <&clockgen 4 15>;
720 			clocks = <&clockgen 4 15>, <&clockgen 4 15>;
727 			clocks = <&clockgen 4 15>, <&clockgen 4 15>;
731 		fsl_mc: fsl-mc@80c000000 {
767 				dpmac4: dpmac@4 {
769 					reg = <4>;