Lines Matching +full:0 +full:x1300000
26 #size-cells = <0>;
28 cpu0: cpu@0 {
31 reg = <0x0>;
33 clocks = <&clockgen 1 0>;
42 reg = <0x1>;
44 clocks = <&clockgen 1 0>;
65 arm,psci-suspend-param = <0x0>;
74 #clock-cells = <0>;
81 #clock-cells = <0>;
88 reg = <0x0 0xf1f0000 0x0 0xffff>;
89 #clock-cells = <0>;
96 offset = <0>;
97 mask = <0x02>;
122 reg= <0x0 0x06000000 0 0x10000>, /* GIC Dist */
123 <0x0 0x06040000 0 0x40000>; /* GIC Redistributor */
126 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_RAW(0xf) |
131 reg = <0x0 0x06020000 0 0x20000>;/* GIC Translater */
139 thermal-sensors = <&tmu 0>;
194 reg = <0x0 0x1080000 0x0 0x1000>;
201 reg = <0x0 0x1e00000 0x0 0x10000>;
207 reg = <0x0 0x1e60000 0x0 0x10000>;
213 reg = <0x0 0x1fc0000 0x0 0x10000>;
219 reg = <0x0 0x1300000 0x0 0xa0000>;
227 #size-cells = <0>;
228 reg = <0x0 0x2000000 0x0 0x10000>;
237 #size-cells = <0>;
238 reg = <0x0 0x2010000 0x0 0x10000>;
247 #size-cells = <0>;
248 reg = <0x0 0x2020000 0x0 0x10000>;
257 #size-cells = <0>;
258 reg = <0x0 0x2030000 0x0 0x10000>;
267 #size-cells = <0>;
268 reg = <0x0 0x2040000 0x0 0x10000>;
277 #size-cells = <0>;
278 reg = <0x0 0x2050000 0x0 0x10000>;
287 #size-cells = <0>;
288 reg = <0x0 0x2060000 0x0 0x10000>;
297 #size-cells = <0>;
298 reg = <0x0 0x2070000 0x0 0x10000>;
307 #size-cells = <0>;
308 reg = <0x0 0x20c0000 0x0 0x10000>,
309 <0x0 0x20000000 0x0 0x10000000>;
312 clocks = <&clockgen 2 0>, <&clockgen 2 0>;
318 compatible = "fsl,ls1028a-dspi", "fsl,ls1021a-v1.0-dspi";
320 #size-cells = <0>;
321 reg = <0x0 0x2100000 0x0 0x10000>;
325 dmas = <&edma0 0 62>, <&edma0 0 60>;
333 compatible = "fsl,ls1028a-dspi", "fsl,ls1021a-v1.0-dspi";
335 #size-cells = <0>;
336 reg = <0x0 0x2110000 0x0 0x10000>;
340 dmas = <&edma0 0 58>, <&edma0 0 56>;
348 compatible = "fsl,ls1028a-dspi", "fsl,ls1021a-v1.0-dspi";
350 #size-cells = <0>;
351 reg = <0x0 0x2120000 0x0 0x10000>;
355 dmas = <&edma0 0 54>, <&edma0 0 2>;
364 reg = <0x0 0x2140000 0x0 0x10000>;
366 clock-frequency = <0>; /* fixed up by bootloader */
377 reg = <0x0 0x2150000 0x0 0x10000>;
379 clock-frequency = <0>; /* fixed up by bootloader */
391 reg = <0x0 0x2180000 0x0 0x10000>;
400 reg = <0x0 0x2190000 0x0 0x10000>;
409 reg = <0x00 0x21c0500 0x0 0x100>;
417 reg = <0x00 0x21c0600 0x0 0x100>;
426 reg = <0x0 0x2260000 0x0 0x1000>;
438 reg = <0x0 0x2270000 0x0 0x1000>;
450 reg = <0x0 0x2280000 0x0 0x1000>;
462 reg = <0x0 0x2290000 0x0 0x1000>;
474 reg = <0x0 0x22a0000 0x0 0x1000>;
486 reg = <0x0 0x22b0000 0x0 0x1000>;
499 reg = <0x0 0x22c0000 0x0 0x10000>,
500 <0x0 0x22d0000 0x0 0x10000>,
501 <0x0 0x22e0000 0x0 0x10000>;
513 reg = <0x0 0x2300000 0x0 0x10000>;
524 reg = <0x0 0x2310000 0x0 0x10000>;
535 reg = <0x0 0x2320000 0x0 0x10000>;
546 reg = <0x0 0x3100000 0x0 0x10000>;
550 snps,quirk-frame-length-adjustment = <0x20>;
556 reg = <0x0 0x3110000 0x0 0x10000>;
560 snps,quirk-frame-length-adjustment = <0x20>;
566 reg = <0x0 0x3200000 0x0 0x10000>,
567 <0x7 0x100520 0x0 0x4>;
576 reg = <0x00 0x03400000 0x0 0x00100000 /* controller registers */
577 0x80 0x00000000 0x0 0x00002000>; /* configuration space */
587 bus-range = <0x0 0xff>;
588 ranges = <0x81000000 0x0 0x00000000 0x80 0x00010000 0x0 0x00010000 /* downstream I/O */
589 0x82000000 0x0 0x40000000 0x80 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
592 interrupt-map-mask = <0 0 0 7>;
593 interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
594 <0000 0 0 2 &gic 0 0 GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
595 <0000 0 0 3 &gic 0 0 GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>,
596 <0000 0 0 4 &gic 0 0 GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
597 iommu-map = <0 &smmu 0 1>; /* Fixed-up by bootloader */
603 reg = <0x00 0x03500000 0x0 0x00100000 /* controller registers */
604 0x88 0x00000000 0x0 0x00002000>; /* configuration space */
614 bus-range = <0x0 0xff>;
615 ranges = <0x81000000 0x0 0x00000000 0x88 0x00010000 0x0 0x00010000 /* downstream I/O */
616 0x82000000 0x0 0x40000000 0x88 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
619 interrupt-map-mask = <0 0 0 7>;
620 interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>,
621 <0000 0 0 2 &gic 0 0 GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>,
622 <0000 0 0 3 &gic 0 0 GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
623 <0000 0 0 4 &gic 0 0 GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
624 iommu-map = <0 &smmu 0 1>; /* Fixed-up by bootloader */
630 reg = <0 0x5000000 0 0x800000>;
633 stream-match-mask = <0x7c00>;
642 /* performance counter interrupts 0-7 */
681 compatible = "fsl,sec-v5.0", "fsl,sec-v4.0";
685 ranges = <0x0 0x00 0x8000000 0x100000>;
686 reg = <0x00 0x8000000 0x0 0x100000>;
691 compatible = "fsl,sec-v5.0-job-ring",
692 "fsl,sec-v4.0-job-ring";
693 reg = <0x10000 0x10000>;
698 compatible = "fsl,sec-v5.0-job-ring",
699 "fsl,sec-v4.0-job-ring";
700 reg = <0x20000 0x10000>;
705 compatible = "fsl,sec-v5.0-job-ring",
706 "fsl,sec-v4.0-job-ring";
707 reg = <0x30000 0x10000>;
712 compatible = "fsl,sec-v5.0-job-ring",
713 "fsl,sec-v4.0-job-ring";
714 reg = <0x40000 0x10000>;
721 reg = <0x0 0x8380000 0x0 0x1000>, /* Controller regs */
722 <0x0 0x8390000 0x0 0x10000>, /* Status regs */
723 <0x0 0x83a0000 0x0 0x40000>; /* Block regs */
733 block-offset = <0x10000>;
741 reg = <0x0 0xc000000 0x0 0x1000>;
748 reg = <0x0 0xc010000 0x0 0x1000>;
754 #sound-dai-cells = <0>;
756 reg = <0x0 0xf100000 0x0 0x10000>;
769 #sound-dai-cells = <0>;
771 reg = <0x0 0xf110000 0x0 0x10000>;
784 #sound-dai-cells = <0>;
786 reg = <0x0 0xf120000 0x0 0x10000>;
799 #sound-dai-cells = <0>;
801 reg = <0x0 0xf130000 0x0 0x10000>;
814 #sound-dai-cells = <0>;
816 reg = <0x0 0xf140000 0x0 0x10000>;
829 #sound-dai-cells = <0>;
831 reg = <0x0 0xf150000 0x0 0x10000>;
845 reg = <0x0 0x1f80000 0x0 0x10000>;
846 interrupts = <0 23 0x4>;
847 fsl,tmu-range = <0xb0000 0xa0026 0x80048 0x70061>;
848 fsl,tmu-calibration = <0x00000000 0x00000024
849 0x00000001 0x0000002b
850 0x00000002 0x00000031
851 0x00000003 0x00000038
852 0x00000004 0x0000003f
853 0x00000005 0x00000045
854 0x00000006 0x0000004c
855 0x00000007 0x00000053
856 0x00000008 0x00000059
857 0x00000009 0x00000060
858 0x0000000a 0x00000066
859 0x0000000b 0x0000006d
861 0x00010000 0x0000001c
862 0x00010001 0x00000024
863 0x00010002 0x0000002c
864 0x00010003 0x00000035
865 0x00010004 0x0000003d
866 0x00010005 0x00000045
867 0x00010006 0x0000004d
868 0x00010007 0x00000055
869 0x00010008 0x0000005e
870 0x00010009 0x00000066
871 0x0001000a 0x0000006e
873 0x00020000 0x00000018
874 0x00020001 0x00000022
875 0x00020002 0x0000002d
876 0x00020003 0x00000038
877 0x00020004 0x00000043
878 0x00020005 0x0000004d
879 0x00020006 0x00000058
880 0x00020007 0x00000063
881 0x00020008 0x0000006e
883 0x00030000 0x00000010
884 0x00030001 0x0000001c
885 0x00030002 0x00000029
886 0x00030003 0x00000036
887 0x00030004 0x00000042
888 0x00030005 0x0000004f
889 0x00030006 0x0000005b
890 0x00030007 0x00000068>;
897 reg = <0x01 0xf0000000 0x0 0x100000>;
902 bus-range = <0x0 0x0>;
904 msi-map = <0 &its 0x17 0xe>;
905 iommu-map = <0 &smmu 0x17 0xe>;
907 ranges = <0x82000000 0x0 0x00000000 0x1 0xf8000000 0x0 0x160000
909 0xc2000000 0x0 0x00000000 0x1 0xf8160000 0x0 0x070000
911 0x82000000 0x0 0x00000000 0x1 0xf81d0000 0x0 0x020000
913 0xc2000000 0x0 0x00000000 0x1 0xf81f0000 0x0 0x020000
915 0x82000000 0x0 0x00000000 0x1 0xf8210000 0x0 0x020000
917 0xc2000000 0x0 0x00000000 0x1 0xf8230000 0x0 0x020000
919 0x82000000 0x0 0x00000000 0x1 0xfc000000 0x0 0x400000>;
921 enetc_port0: ethernet@0,0 {
923 reg = <0x000000 0 0 0 0>;
927 enetc_port1: ethernet@0,1 {
929 reg = <0x000100 0 0 0 0>;
933 enetc_port2: ethernet@0,2 {
935 reg = <0x000200 0 0 0 0>;
945 enetc_mdio_pf3: mdio@0,3 {
947 reg = <0x000300 0 0 0 0>;
949 #size-cells = <0>;
952 ethernet@0,4 {
954 reg = <0x000400 0 0 0 0>;
960 mscc_felix: ethernet-switch@0,5 {
961 reg = <0x000500 0 0 0 0>;
968 #size-cells = <0>;
971 mscc_felix_port0: port@0 {
972 reg = <0>;
1016 enetc_port3: ethernet@0,6 {
1018 reg = <0x000600 0 0 0 0>;
1031 reg = <0x0 0x1e34040 0x0 0x1c>;
1038 reg = <0x0 0x2800000 0x0 0x10000>;
1039 fsl,rcpm-wakeup = <&rcpm 0x0 0x0 0x0 0x0 0x4000 0x0 0x0>;
1046 reg = <0x0 0xf080000 0x0 0x10000>;
1047 interrupts = <0 222 IRQ_TYPE_LEVEL_HIGH>,
1048 <0 223 IRQ_TYPE_LEVEL_HIGH>;
1054 arm,malidp-arqos-value = <0xd000d000>;