Lines Matching +full:0 +full:x0000006a
31 #size-cells = <0>;
33 cpu0: cpu@0 {
36 reg = <0x0>;
37 clocks = <&clockgen 1 0>;
53 arm,psci-suspend-param = <0x0>;
62 #clock-cells = <0>;
69 #clock-cells = <0>;
84 interrupts = <0 106 IRQ_TYPE_LEVEL_HIGH>;
91 reg = <0x0 0x1401000 0 0x1000>, /* GICD */
92 <0x0 0x1402000 0 0x2000>, /* GICC */
93 <0x0 0x1404000 0 0x2000>, /* GICH */
94 <0x0 0x1406000 0 0x2000>; /* GICV */
101 offset = <0xb0>;
102 mask = <0x02>;
109 thermal-sensors = <&tmu 0>;
145 #size-cells = <0>;
146 reg = <0x0 0x1550000 0x0 0x10000>,
147 <0x0 0x40000000 0x0 0x10000000>;
151 clocks = <&clockgen 4 0>, <&clockgen 4 0>;
157 reg = <0x0 0x1560000 0x0 0x10000>;
158 interrupts = <0 62 0x4>;
159 clocks = <&clockgen 4 0>;
169 reg = <0x0 0x1570000 0x0 0x10000>;
175 reg = <0x0 0x1580000 0x0 0x10000>;
176 interrupts = <0 65 0x4>;
177 clocks = <&clockgen 4 0>;
187 compatible = "fsl,sec-v5.4", "fsl,sec-v5.0",
188 "fsl,sec-v4.0";
192 ranges = <0x0 0x00 0x1700000 0x100000>;
193 reg = <0x00 0x1700000 0x0 0x100000>;
199 "fsl,sec-v5.0-job-ring",
200 "fsl,sec-v4.0-job-ring";
201 reg = <0x10000 0x10000>;
207 "fsl,sec-v5.0-job-ring",
208 "fsl,sec-v4.0-job-ring";
209 reg = <0x20000 0x10000>;
215 "fsl,sec-v5.0-job-ring",
216 "fsl,sec-v4.0-job-ring";
217 reg = <0x30000 0x10000>;
223 "fsl,sec-v5.0-job-ring",
224 "fsl,sec-v4.0-job-ring";
225 reg = <0x40000 0x10000>;
231 "fsl,sec-v5.0-rtic",
232 "fsl,sec-v4.0-rtic";
235 reg = <0x60000 0x100 0x60e00 0x18>;
236 ranges = <0x0 0x60100 0x500>;
238 rtic_a: rtic-a@0 {
240 "fsl,sec-v5.0-rtic-memory",
241 "fsl,sec-v4.0-rtic-memory";
242 reg = <0x00 0x20 0x100 0x100>;
247 "fsl,sec-v5.0-rtic-memory",
248 "fsl,sec-v4.0-rtic-memory";
249 reg = <0x20 0x20 0x200 0x100>;
254 "fsl,sec-v5.0-rtic-memory",
255 "fsl,sec-v4.0-rtic-memory";
256 reg = <0x40 0x20 0x300 0x100>;
261 "fsl,sec-v5.0-rtic-memory",
262 "fsl,sec-v4.0-rtic-memory";
263 reg = <0x60 0x20 0x400 0x100>;
269 compatible = "fsl,sec-v5.4-mon", "fsl,sec-v5.0-mon",
270 "fsl,sec-v4.0-mon";
271 reg = <0x0 0x1e90000 0x0 0x10000>;
279 reg = <0x0 0x1ee0000 0x0 0x10000>;
285 reg = <0x0 0x1ee1000 0x0 0x1000>;
293 reg = <0x0 0x1f00000 0x0 0x10000>;
294 interrupts = <0 33 0x4>;
295 fsl,tmu-range = <0xb0000 0x9002a 0x6004c 0x30062>;
296 fsl,tmu-calibration = <0x00000000 0x00000026
297 0x00000001 0x0000002d
298 0x00000002 0x00000032
299 0x00000003 0x00000039
300 0x00000004 0x0000003f
301 0x00000005 0x00000046
302 0x00000006 0x0000004d
303 0x00000007 0x00000054
304 0x00000008 0x0000005a
305 0x00000009 0x00000061
306 0x0000000a 0x0000006a
307 0x0000000b 0x00000071
309 0x00010000 0x00000025
310 0x00010001 0x0000002c
311 0x00010002 0x00000035
312 0x00010003 0x0000003d
313 0x00010004 0x00000045
314 0x00010005 0x0000004e
315 0x00010006 0x00000057
316 0x00010007 0x00000061
317 0x00010008 0x0000006b
318 0x00010009 0x00000076
320 0x00020000 0x00000029
321 0x00020001 0x00000033
322 0x00020002 0x0000003d
323 0x00020003 0x00000049
324 0x00020004 0x00000056
325 0x00020005 0x00000061
326 0x00020006 0x0000006d
328 0x00030000 0x00000021
329 0x00030001 0x0000002a
330 0x00030002 0x0000003c
331 0x00030003 0x0000004e>;
339 #size-cells = <0>;
340 reg = <0x0 0x2180000 0x0 0x10000>;
341 interrupts = <0 56 IRQ_TYPE_LEVEL_HIGH>;
349 #size-cells = <0>;
350 reg = <0x0 0x2190000 0x0 0x10000>;
351 interrupts = <0 57 IRQ_TYPE_LEVEL_HIGH>;
357 compatible = "fsl,ls1012a-dspi", "fsl,ls1021a-v1.0-dspi";
359 #size-cells = <0>;
360 reg = <0x0 0x2100000 0x0 0x10000>;
361 interrupts = <0 64 IRQ_TYPE_LEVEL_HIGH>;
363 clocks = <&clockgen 4 0>;
371 reg = <0x00 0x21c0500 0x0 0x100>;
372 interrupts = <0 54 IRQ_TYPE_LEVEL_HIGH>;
373 clocks = <&clockgen 4 0>;
379 reg = <0x00 0x21c0600 0x0 0x100>;
380 interrupts = <0 54 IRQ_TYPE_LEVEL_HIGH>;
381 clocks = <&clockgen 4 0>;
387 reg = <0x0 0x2300000 0x0 0x10000>;
388 interrupts = <0 66 IRQ_TYPE_LEVEL_HIGH>;
397 reg = <0x0 0x2310000 0x0 0x10000>;
398 interrupts = <0 67 IRQ_TYPE_LEVEL_HIGH>;
408 reg = <0x0 0x2ad0000 0x0 0x10000>;
409 interrupts = <0 83 IRQ_TYPE_LEVEL_HIGH>;
410 clocks = <&clockgen 4 0>;
415 #sound-dai-cells = <0>;
417 reg = <0x0 0x2b50000 0x0 0x10000>;
418 interrupts = <0 148 IRQ_TYPE_LEVEL_HIGH>;
429 #sound-dai-cells = <0>;
431 reg = <0x0 0x2b60000 0x0 0x10000>;
432 interrupts = <0 149 IRQ_TYPE_LEVEL_HIGH>;
445 reg = <0x0 0x2c00000 0x0 0x10000>,
446 <0x0 0x2c10000 0x0 0x10000>,
447 <0x0 0x2c20000 0x0 0x10000>;
448 interrupts = <0 103 IRQ_TYPE_LEVEL_HIGH>,
449 <0 103 IRQ_TYPE_LEVEL_HIGH>;
460 reg = <0x0 0x2f00000 0x0 0x10000>;
461 interrupts = <0 60 0x4>;
463 snps,quirk-frame-length-adjustment = <0x20>;
470 reg = <0x0 0x3200000 0x0 0x10000>,
471 <0x0 0x20140520 0x0 0x4>;
473 interrupts = <0 69 IRQ_TYPE_LEVEL_HIGH>;
474 clocks = <&clockgen 4 0>;
481 reg = <0x0 0x8600000 0x0 0x1000>;
482 interrupts = <0 139 0x4>;
489 reg = <0x0 0x1572000 0x0 0x8>;
491 interrupts = <0 126 IRQ_TYPE_LEVEL_HIGH>;
496 reg = <0x00 0x03400000 0x0 0x00100000 /* controller registers */
497 0x40 0x00000000 0x0 0x00002000>; /* configuration space */
499 interrupts = <0 118 0x4>, /* controller interrupt */
500 <0 117 0x4>; /* PME interrupt */
506 bus-range = <0x0 0xff>;
507 ranges = <0x81000000 0x0 0x00000000 0x40 0x00010000 0x0 0x00010000 /* downstream I/O */
508 0x82000000 0x0 0x40000000 0x40 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
511 interrupt-map-mask = <0 0 0 7>;
512 interrupt-map = <0000 0 0 1 &gic 0 110 IRQ_TYPE_LEVEL_HIGH>,
513 <0000 0 0 2 &gic 0 111 IRQ_TYPE_LEVEL_HIGH>,
514 <0000 0 0 3 &gic 0 112 IRQ_TYPE_LEVEL_HIGH>,
515 <0000 0 0 4 &gic 0 113 IRQ_TYPE_LEVEL_HIGH>;
521 reg = <0x0 0x1ee2140 0x0 0x4>;
527 reg = <0x0 0x29d0000 0x0 0x10000>;
528 fsl,rcpm-wakeup = <&rcpm 0x20000>;