Lines Matching +full:0 +full:x15571800
45 #clock-cells = <0>;
50 #size-cells = <0>;
52 cpu_atlas0: cpu@0 {
55 reg = <0x0>;
62 reg = <0x1>;
69 reg = <0x2>;
76 reg = <0x3>;
84 cpu_off = <0x84000002>;
85 cpu_on = <0xC4000003>;
88 soc: soc@0 {
92 ranges = <0 0 0 0x18000000>;
96 reg = <0x10000000 0x100>;
102 #address-cells = <0>;
104 reg = <0x11001000 0x1000>,
105 <0x11002000 0x2000>,
106 <0x11004000 0x2000>,
107 <0x11006000 0x2000>;
112 reg = <0x10E10000 0x1000>;
123 reg = <0x10EB0000 0x1000>;
134 reg = <0x10570000 0x10000>;
140 reg = <0x105d0000 0xb000>;
153 reg = <0x105e0000 0xb000>;
166 reg = <0x105b0000 0xd00>;
174 reg = <0x13610000 0xd00>;
184 reg = <0x14c80000 0xd00>;
196 reg = <0x10040000 0xd00>;
204 reg = <0x10e90000 0xd00>;
214 reg = <0x156e0000 0xd00>;
230 reg = <0x13630000 0x100>;
240 reg = <0x14c20000 0x100>;
250 reg = <0x14c30000 0x100>;
260 reg = <0x14c40000 0x100>;
270 reg = <0x10580000 0x1000>;
281 reg = <0x13470000 0x1000>;
287 reg = <0x14cd0000 0x1000>;
293 reg = <0x14ce0000 0x1000>;
299 reg = <0x14c90000 0x1000>;
305 reg = <0x14ca0000 0x1000>;
311 reg = <0x10e60000 0x1000>;
317 reg = <0x15690000 0x1000>;
323 reg = <0x14870000 0x1000>;
329 reg = <0x13640000 0x1000>;
332 #size-cells = <0>;
334 pinctrl-0 = <&hs_i2c0_bus>;
342 reg = <0x13650000 0x1000>;
345 #size-cells = <0>;
347 pinctrl-0 = <&hs_i2c1_bus>;
355 reg = <0x14e60000 0x1000>;
358 #size-cells = <0>;
360 pinctrl-0 = <&hs_i2c2_bus>;
368 reg = <0x14e70000 0x1000>;
371 #size-cells = <0>;
373 pinctrl-0 = <&hs_i2c3_bus>;
381 reg = <0x13660000 0x1000>;
384 #size-cells = <0>;
386 pinctrl-0 = <&hs_i2c4_bus>;
394 reg = <0x13670000 0x1000>;
397 #size-cells = <0>;
399 pinctrl-0 = <&hs_i2c5_bus>;
407 reg = <0x14e00000 0x1000>;
410 #size-cells = <0>;
412 pinctrl-0 = <&hs_i2c6_bus>;
420 reg = <0x13e10000 0x1000>;
423 #size-cells = <0>;
425 pinctrl-0 = <&hs_i2c7_bus>;
433 reg = <0x14e20000 0x1000>;
436 #size-cells = <0>;
438 pinctrl-0 = <&hs_i2c8_bus>;
446 reg = <0x13680000 0x1000>;
449 #size-cells = <0>;
451 pinctrl-0 = <&hs_i2c9_bus>;
459 reg = <0x13690000 0x1000>;
462 #size-cells = <0>;
464 pinctrl-0 = <&hs_i2c10_bus>;
472 reg = <0x136a0000 0x1000>;
475 #size-cells = <0>;
477 pinctrl-0 = <&hs_i2c11_bus>;
485 reg = <0x105c0000 0x5000>;
490 reg = <0x10590000 0x100>;
500 reg = <0x101d0000 0x100>;
510 reg = <0x14ac0000 0x5000>;
523 #size-cells = <0>;
524 reg = <0x15740000 0x2000>;
528 fifo-depth = <0x40>;
536 #size-cells = <0>;
537 reg = <0x15750000 0x2000>;
541 fifo-depth = <0x40>;
549 #size-cells = <0>;
550 reg = <0x15560000 0x2000>;
554 fifo-depth = <0x40>;
560 reg = <0x13620000 0x100>;
571 reg = <0x136c0000 0x100>;
577 samsung,pwm-outputs = <0>, <1>, <2>, <3>;
585 reg = <0x10060000 0x200>;
590 #thermal-sensor-cells = <0>;
595 reg = <0x15570000 0x100>, /* 0: HCI standard */
596 <0x15570100 0x100>, /* 1: Vendor specificed */
597 <0x15571000 0x200>, /* 2: UNIPRO */
598 <0x15572000 0x300>; /* 3: UFS protector */
604 freq-table-hz = <0 0>, <0 0>;
606 pinctrl-0 = <&ufs_rst_n &ufs_refclk_out>;
614 reg = <0x15571800 0x240>;
617 #phy-cells = <0>;
629 reg = <0x15500000 0x100>;
654 reg = <0x15400000 0x10000>;
656 phys = <&usbdrd_phy 0>, <&usbdrd_phy 1>;
664 polling-delay-passive = <0>; /* milliseconds */
665 polling-delay = <0>; /* milliseconds */