Lines Matching refs:erratum

374 	  erratum 826319 on Cortex-A53 parts up to r0p2 with an AMBA 4 ACE or
396 	  erratum 827319 on Cortex-A53 parts up to r0p2 with an AMBA 5 CHI
399 	  Under certain conditions this erratum can cause a clean line eviction
418 	  erratum 824069 on Cortex-A53 parts up to r0p2 when it is connected
424 	  address, then this erratum might cause a clean cache line to be
441 	  erratum 819472 on Cortex-A53 parts up to r0p1 with an L2 cache
446 	  maintenance operation to the same address, then this erratum might
462 	  erratum 832075 on Cortex-A57 parts up to r1p2.
481 	  erratum 834220 on Cortex-A57 parts up to r1p2.
502 	  workaround erratum 1742098 on Cortex-A57 and Cortex-A72.
518 	  erratum 845719 on Cortex-A53 parts up to r0p4.
555 	  this erratum will continue to use the feature.
581 	  This option adds a workaround for ARM Cortex-A76 erratum 1165522.
594 	  This option adds work arounds for ARM Cortex-A57 erratum 1319537
595 	  and A72 erratum 1319367
607 	  This option adds a workaround for ARM Cortex-A55 erratum 1530923.
623 	  This option adds a workaround for ARM Cortex-A76 erratum 1286807.
638 	  This option adds a workaround for Arm Cortex-A76 erratum 1463225.
646 	  Work around the erratum by triggering a dummy step exception
656 	  This option adds a workaround for ARM Neoverse-N1 erratum
672 	  This option adds a workaround for Arm Cortex-A77 erratum 1508412.
692 	  This options adds the workaround for ARM Cortex-A510 erratum ARM64_ERRATUM_2051678.
707 	  Enable workaround for ARM Cortex-A710 erratum 2054223
722 	  Enable workaround for ARM Neoverse-N2 erratum 2067961
737 	  This option adds the workaround for ARM Cortex-A510 erratum 2454944.
760 	  This option adds the workaround for ARM Cortex-A510 erratum 2457168.
774 	bool "Cavium erratum 22375, 24313"
782 	    erratum 22375: only alloc 8MB table size
783 	    erratum 24313: ignore memory access type
791 	bool "Cavium erratum 23144: ITS SYNC hang on dual socket system"
800 	bool "Cavium erratum 23154: Access to ICC_IAR1_EL1 is not sync'ed"
810 	bool "Cavium erratum 27456: Broadcast TLBI instructions may cause icache corruption"
821 	bool "Cavium erratum 30115: Guest may disable interrupts in host"
832 	bool "Cavium ThunderX2 erratum 219: PRFM between TTBR change and ISB fails"
849 	bool "Fujitsu-A64FX erratum E#010001: Undefined fault may occur wrongly"
852 	  This option adds a workaround for Fujitsu-A64FX erratum E#010001.
885 	  is unchanged. Work around the erratum by invalidating the walk cache