Lines Matching full:affected
386 the kernel if an affected CPU is detected.
408 the kernel if an affected CPU is detected.
431 only patch the kernel if an affected CPU is detected.
453 the kernel if an affected CPU is detected.
464 Affected Cortex-A57 parts might deadlock when exclusive load/store
471 the kernel if an affected CPU is detected.
483 Affected Cortex-A57 parts might report a Stage 2 translation
492 the kernel if an affected CPU is detected.
504 Affected parts may corrupt the AES state if an interrupt is
520 When running a compat (AArch32) userspace on an affected Cortex-A53
529 the kernel if an affected CPU is detected.
551 Affected Cortex-A55 cores (all revisions) could cause incorrect
554 of hardware DBM locally on the affected cores. CPUs not affected by
567 Affected Cortex-A76/Neoverse-N1 cores (r0p0 to r3p1) could
583 Affected Cortex-A76 cores (r0p0, r1p0, r2p0) could end-up with
609 Affected Cortex-A55 cores (r0p0, r0p1, r1p0, r2p0) could end-up with
625 On the affected Cortex-A76 cores (r0p0 to r3p0), if a virtual
640 On the affected Cortex-A76 cores (r0p0 to r3p1), software stepping
659 Affected Neoverse-N1 cores could execute a stale instruction when
674 Affected Cortex-A77 cores (r0p0, r1p0) could deadlock on a sequence
693 Affected Coretex-A510 might not respect the ordering rules for
695 is to not enable the feature on affected CPUs.
709 Affected cores may fail to flush the trace data on a TSB instruction, when
713 Workaround is to issue two TSB consecutively on affected cores.
724 Affected cores may fail to flush the trace data on a TSB instruction, when
728 Workaround is to issue two TSB consecutively on affected cores.
739 Affected Cortex-A510 core might write unmodified cache lines back to
753 affected systems.
763 as the system counter. On affected Cortex-A510 cores AMEVCNTR01 increments
766 Work around this problem by keeping the reference values of affected counters
768 affected counters, in which case 0 will be returned when reading the disabled