Lines Matching full:cortex
369 …bool "Cortex-A53: 826319: System might deadlock if a write cannot complete until read data is acce…
374 erratum 826319 on Cortex-A53 parts up to r0p2 with an AMBA 4 ACE or
377 If a Cortex-A53 uses an AMBA AXI4 ACE interface to other processors
391 …bool "Cortex-A53: 827319: Data cache clean instructions might cause overlapping transactions to th…
396 erratum 827319 on Cortex-A53 parts up to r0p2 with an AMBA 5 CHI
413 bool "Cortex-A53: 824069: Cache line might not be marked as clean after a CleanShared snoop"
418 erratum 824069 on Cortex-A53 parts up to r0p2 when it is connected
421 If a Cortex-A53 processor is executing a store or prefetch for
436 bool "Cortex-A53: 819472: Store exclusive instructions might cause data corruption"
441 erratum 819472 on Cortex-A53 parts up to r0p1 with an L2 cache
458 bool "Cortex-A57: 832075: possible deadlock on mixing exclusive memory accesses with device loads"
462 erratum 832075 on Cortex-A57 parts up to r1p2.
464 Affected Cortex-A57 parts might deadlock when exclusive load/store
476 …bool "Cortex-A57: 834220: Stage 2 translation fault might be incorrectly reported in presence of a…
481 erratum 834220 on Cortex-A57 parts up to r1p2.
483 Affected Cortex-A57 parts might report a Stage 2 translation
497 …bool "Cortex-A57/A72: 1742098: ELR recorded incorrectly on interrupt taken between cryptographic i…
502 workaround erratum 1742098 on Cortex-A57 and Cortex-A72.
513 bool "Cortex-A53: 845719: a load might read incorrect data"
518 erratum 845719 on Cortex-A53 parts up to r0p4.
520 When running a compat (AArch32) userspace on an affected Cortex-A53
534 bool "Cortex-A53: 843419: A load or store might access an incorrect address"
538 This option links the kernel with '--fix-cortex-a53-843419' and
541 Cortex-A53 parts up to r0p4.
546 …bool "Cortex-A55: 1024718: Update of DBM/AP bits without break before make might result in incorre…
549 This option adds a workaround for ARM Cortex-A55 Erratum 1024718.
551 Affected Cortex-A55 cores (all revisions) could cause incorrect
560 …bool "Cortex-A76/Neoverse-N1: MRC read following MRRC read of specific Generic Timer in AArch32 mi…
564 This option adds a workaround for ARM Cortex-A76/Neoverse-N1
567 Affected Cortex-A76/Neoverse-N1 cores (r0p0 to r3p1) could
577 …bool "Cortex-A76: 1165522: Speculative AT instruction using out-of-context translation regime coul…
581 This option adds a workaround for ARM Cortex-A76 erratum 1165522.
583 Affected Cortex-A76 cores (r0p0, r1p0, r2p0) could end-up with
590 …bool "Cortex-A57/A72: 1319537: Speculative AT instruction using out-of-context translation regime …
594 This option adds work arounds for ARM Cortex-A57 erratum 1319537
597 Cortex-A57 and A72 cores could end-up with corrupted TLBs by
603 …bool "Cortex-A55: 1530923: Speculative AT instruction using out-of-context translation regime coul…
607 This option adds a workaround for ARM Cortex-A55 erratum 1530923.
609 Affected Cortex-A55 cores (r0p0, r0p1, r1p0, r2p0) could end-up with
619 …bool "Cortex-A76: Modification of the translation table for a virtual address might lead to read-a…
623 This option adds a workaround for ARM Cortex-A76 erratum 1286807.
625 On the affected Cortex-A76 cores (r0p0 to r3p0), if a virtual
635 bool "Cortex-A76: Software Step might prevent interrupt recognition"
638 This option adds a workaround for Arm Cortex-A76 erratum 1463225.
640 On the affected Cortex-A76 cores (r0p0 to r3p1), software stepping
669 …bool "Cortex-A77: 1508412: workaround deadlock on sequence of NC/Device load and store exclusive o…
672 This option adds a workaround for Arm Cortex-A77 erratum 1508412.
674 Affected Cortex-A77 cores (r0p0, r1p0) could deadlock on a sequence
689 bool "Cortex-A510: 2051678: disable Hardware Update of the page table's dirty bit"
692 This options adds the workaround for ARM Cortex-A510 erratum ARM64_ERRATUM_2051678.
703 bool "Cortex-A710: 2054223: workaround TSB instruction failing to flush trace"
707 Enable workaround for ARM Cortex-A710 erratum 2054223
733 bool "Cortex-A510: 2454944: Unmodified cache line might be written back to memory"
737 This option adds the workaround for ARM Cortex-A510 erratum 2454944.
739 Affected Cortex-A510 core might write unmodified cache lines back to
756 bool "Cortex-A510: 2457168: workaround for AMEVCNTR01 incrementing incorrectly"
760 This option adds the workaround for ARM Cortex-A510 erratum 2457168.
763 as the system counter. On affected Cortex-A510 cores AMEVCNTR01 increments