71 static void __iomem *pmugrf_base;  variable
506 			       pmugrf_base + RV1106_PMUGRF_SOC_CON(1));  in pvtm_32k_config()
545 			       pmugrf_base + RV1106_PMUGRF_SOC_CON(3));  in pvtm_32k_config()
574 	ddr_data.pmugrf_soc_con0 = readl_relaxed(pmugrf_base + RV1106_PMUGRF_SOC_CON(0));  in ddr_sleep_config()
598 	writel_relaxed(BITS_WITH_WMASK(0x0, 0x7, 9), pmugrf_base + RV1106_PMUGRF_SOC_CON(0));  in ddr_sleep_config()
613 	ddr_data.pmugrf_soc_con1 = readl_relaxed(pmugrf_base + RV1106_PMUGRF_SOC_CON(1));  in pmu_sleep_config()
614 	ddr_data.pmugrf_soc_con4 = readl_relaxed(pmugrf_base + RV1106_PMUGRF_SOC_CON(4));  in pmu_sleep_config()
615 	ddr_data.pmugrf_soc_con5 = readl_relaxed(pmugrf_base + RV1106_PMUGRF_SOC_CON(5));  in pmu_sleep_config()
690 	writel_relaxed(BITS_WITH_WMASK(0x4, 0x7, 0), pmugrf_base + RV1106_PMUGRF_SOC_CON(1));  in pmu_sleep_config()
692 	writel_relaxed(BITS_WITH_WMASK(0x1, 0x1, 0), pmugrf_base + RV1106_PMUGRF_SOC_CON(1));  in pmu_sleep_config()
714 	writel_relaxed(0xffffffff, pmugrf_base + RV1106_PMUGRF_SOC_CON(4));  in pmu_sleep_config()
715 	writel_relaxed(0xffffff47, pmugrf_base + RV1106_PMUGRF_SOC_CON(5));  in pmu_sleep_config()
730 	writel_relaxed(0, pmugrf_base + RV1106_PMUGRF_OS_REG(9));  in pmu_sleep_config()
732 	writel_relaxed(0, pmugrf_base + RV1106_PMUGRF_OS_REG(10));  in pmu_sleep_config()
734 	writel_relaxed(PMU_SUSPEND_MAGIC, pmugrf_base + RV1106_PMUGRF_OS_REG(9));  in pmu_sleep_config()
757 		       pmugrf_base + RV1106_PMUGRF_SOC_CON(1));  in pmu_sleep_restore()
759 		       pmugrf_base + RV1106_PMUGRF_SOC_CON(4));  in pmu_sleep_restore()
761 		       pmugrf_base + RV1106_PMUGRF_SOC_CON(5));  in pmu_sleep_restore()
1043 	pmugrf_base = dev_reg_base + RV1106_PMUGRF_OFFSET;  in rv1106_suspend_init()