Lines Matching refs:orr
177 orr tmp1, tmp1, #AT91_PMC_PRES_64
186 orr tmp1, tmp1, #AT91_PMC_KEY
199 orr tmp1, tmp1, #AT91_PMC_KEY
228 orr tmp1, tmp1, #AT91_PMC_MOSCRCEN
230 orr tmp1, tmp1, #AT91_PMC_KEY
240 orr tmp1, tmp1, #AT91_PMC_MOSCEN
241 orr tmp1, tmp1, #AT91_PMC_KEY
264 orr tmp1, tmp1, #AT91_PMC_MOSCRCEN
266 orr tmp1, tmp1, #AT91_PMC_KEY
278 orr tmp1, tmp1, #AT91_PMC_KEY
287 orr tmp1, tmp1, #AT91_PMC_KEY
293 orr tmp1, tmp1, #AT91_PMC_CSS_MAIN
300 orr tmp1, tmp1, #AT91_PMC_WAITMODE
302 orr tmp1, tmp1, #AT91_PMC_KEY
313 orr tmp1, tmp1, #AT91_PMC_MOSCEN
315 orr tmp1, tmp1, #AT91_PMC_KEY
329 orr tmp1, tmp1, #AT91_PMC_MOSCSEL
331 orr tmp1, tmp1, #AT91_PMC_KEY
339 orr tmp1, tmp1, #AT91_PMC_CSS_MAIN
353 orr tmp1, tmp1, #AT91_PMC_KEY
380 orr tmp1, tmp1, tmp2
385 orr tmp1, tmp1, tmp2
397 orr tmp1, tmp1, #AT91_PMC_PLL_CTRL0_ENPLL
402 orr tmp1, tmp1, #AT91_PMC_PLL_UPDT_UPDATE
413 orr tmp1, tmp1, #AT91_PMC_PLL_UPDT_UPDATE
426 orr tmp1, tmp1, #(1 << 29) /* bit 29 always set */
452 orr tmp1, tmp1, tmp3
458 orr tmp1, tmp1, #AT91_PMC_PLL_UPDT_UPDATE
463 orr tmp1, tmp1, #AT91_PMC_PLL_CTRL0_ENLOCK
464 orr tmp1, tmp1, #AT91_PMC_PLL_CTRL0_ENPLL
465 orr tmp1, tmp1, #AT91_PMC_PLL_CTRL0_ENPLLCK
469 orr tmp1, tmp1, tmp3
474 orr tmp1, tmp1, #AT91_PMC_PLL_UPDT_UPDATE
517 orr tmp1, tmp1, #AT91_PMC_CSS_MAIN
610 orr r3, r3, #AT91_DDRSDRC_LPCB_SELF_REFRESH
631 orr r3, r3, #AT91_DDRSDRC_LPCB_SELF_REFRESH
666 orr r3, r3, #AT91_SDRAMC_LPCB_SELF_REFRESH