boot/dts/ste-hrefv60plus.dtsi

1 // SPDX-License-Identifier: GPL-2.0-or-later
3  * Copyright 2012 ST-Ericsson AB
6 #include "ste-href-ab8500.dtsi"
7 #include "ste-href.dtsi"
10 	model = "ST-Ericsson HREF (v60+) platform with Device Tree";
11 	compatible = "st-ericsson,hrefv60+", "st-ericsson,u8500";
16 			/* GPIOs 0 - 31 */
17 			gpio-line-names =
38 			/* GPIOs 32 - 63 */
39 			gpio-line-names =
48 			/* GPIOs 64 - 95 */
49 			gpio-line-names = "XENON_EN2 (FLASH_CTRL_4)",
55 				     /* GPIO 70-77 used for ETM */
57 				     /* GPIO 78-81 used for YCBCR */
71 			/* GPIOs 96 - 127 */
72 			gpio-line-names = "",
81 			/* GPIOs 128 - 159 */
82 			gpio-line-names = "", "", "", "", "", "", "", "",
98 			/* GPIOs 160 - 191 */
99 			gpio-line-names = "", "", "", "", "", "", "", "",
110 			/* GPIOs 192 - 223 */
111 			gpio-line-names = "HDTV_INTN",
117 				     /* GPIO208-216 used for WGBF_MC1 */
125 			/* GPIOs 224 - 255 */
126 			gpio-line-names = "", "",
136 			cd-gpios  = <&gpio2 31 GPIO_ACTIVE_HIGH>; // 95
139 		vmmci: regulator-gpio {
141 			enable-gpio = <&gpio5 9 GPIO_ACTIVE_HIGH>;
142 			enable-active-high;
150 			pinctrl-names = "default";
151 			pinctrl-0 = <&ipgpio_hrefv60_mode>,
166 						pins = "GPIO95_E8";
169 					/* VMMCI level-shifter enable */
171 						pins = "GPIO169_D22";
174 					/* VMMCI level-shifter voltage select */
176 						pins = "GPIO5_AG6";
195 						pins = "GPIO6_AF6", "GPIO7_AG5";
199 						pins = "GPIO21_AB3";
203 						pins = "GPIO64_F3";
210 				 * Drive D19-D23 for the ETM PTM trace interface low,
211 				 * (presumably pins are unconnected therefore grounded here,
212 				 * the "other alt C1" setting enables these pins)
216 						pins =
230 						pins = "GPIO76_J2";
234 						pins = "GPIO216_AG12";
243 						pins =
249 						pins = "GPIO144_B13"; /* NFC_IRQ */
257 						pins = "GPIO91_B6"; /* FORCE_SENSING_INT */
261 						pins =
271 						pins = "GPIO139_C9"; /* DIPRO_INT */
280 						pins = "GPIO149_B14"; /* VAUDIO_HF_EN, enable MAX8968 */
288 					 * GBF (GPS, Bluetooth, FM-radio) interface,
292 						pins = "GPIO171_D23"; /* GBF_ENA_RESET */
301 						pins = "GPIO192_AJ27";
309 					 * Display Interface 1 uses GPIO 65 for RST (reset).
310 					 * Display Interface 2 uses GPIO 66 for RST (reset).
314 						pins ="GPIO65_F1";
318 						pins ="GPIO66_G3";
324 				/* Dangling GPIO pins */
328 						pins = "GPIO4_AH6";