boot/dts/rv1108.dtsi

29 		#size-cells = <0>;
34 			reg = <0xf00>;
85 		#clock-cells = <0>;
96 			reg = <0x102a0000 0x4000>;
97 			interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
108 		reg = <0x10080000 0x2000>;
111 		ranges = <0 0x10080000 0x2000>;
116 		reg = <0x10210000 0x100>;
125 		pinctrl-0 = <&uart2m0_xfer>;
131 		reg = <0x10220000 0x100>;
140 		pinctrl-0 = <&uart1_xfer>;
146 		reg = <0x10230000 0x100>;
155 		pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>;
161 		reg = <0x10240000 0x1000>;
164 		#size-cells = <0>;
168 		pinctrl-0 = <&i2c1_xfer>;
175 		reg = <0x10250000 0x1000>;
178 		#size-cells = <0>;
182 		pinctrl-0 = <&i2c2m1_xfer>;
189 		reg = <0x10260000 0x1000>;
192 		#size-cells = <0>;
196 		pinctrl-0 = <&i2c3_xfer>;
203 		reg = <0x10270000 0x1000>;
210 		#size-cells = <0>;
216 		reg = <0x10280000 0x10>;
221 		pinctrl-0 = <&pwm4_pin>;
228 		reg = <0x10280010 0x10>;
233 		pinctrl-0 = <&pwm5_pin>;
240 		reg = <0x10280020 0x10>;
245 		pinctrl-0 = <&pwm6_pin>;
252 		reg = <0x10280030 0x10>;
257 		pinctrl-0 = <&pwm7_pin>;
264 		reg = <0x10300000 0x1000>;
270 			reg = <0x100 0x0c>;
273 			#clock-cells = <0>;
281 				#phy-cells = <0>;
288 				#phy-cells = <0>;
296 		reg = <0x10350000 0x20>;
304 		reg = <0x10360000 0x100>;
316 			thermal-sensors = <&tsadc 0>;
348 		reg = <0x10370000 0x100>;
355 		pinctrl-0 = <&otp_pin>;
367 		reg = <0x1038c000 0x100>;
377 		reg = <0x20000000 0x1000>;
380 		#size-cells = <0>;
384 		pinctrl-0 = <&i2c0_xfer>;
391 		reg = <0x20040000 0x10>;
396 		pinctrl-0 = <&pwm0_pin>;
403 		reg = <0x20040010 0x10>;
408 		pinctrl-0 = <&pwm1_pin>;
415 		reg = <0x20040020 0x10>;
420 		pinctrl-0 = <&pwm2_pin>;
427 		reg = <0x20040030 0x10>;
432 		pinctrl-0 = <&pwm3_pin>;
439 		reg = <0x20060000 0x1000>;
444 		reg = <0x202a0000 0x1000>;
449 		reg = <0x20200000 0x1000>;
457 		reg = <0x30110000 0x4000>;
462 		fifo-depth = <0x100>;
469 		reg = <0x30120000 0x4000>;
474 		fifo-depth = <0x100>;
481 		reg = <0x30130000 0x4000>;
486 		fifo-depth = <0x100>;
489 		pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
495 		reg = <0x30140000 0x20000>;
505 		reg = <0x30160000 0x20000>;
516 		reg = <0x30180000 0x40000>;
531 		reg = <0x30200000 0x10000>;
546 		pinctrl-0 = <&rmii_pins>;
555 		#address-cells = <0>;
557 		reg = <0x32011000 0x1000>,
558 		      <0x32012000 0x2000>,
559 		      <0x32014000 0x2000>,
560 		      <0x32016000 0x2000>;
574 			reg = <0x20030000 0x100>;
587 			reg = <0x10310000 0x100>;
600 			reg = <0x10320000 0x100>;
613 			reg = <0x10330000 0x100>;
714 				rockchip,pins = <0 RK_PB1 1 &pcfg_pull_none_smt>,
715 						<0 RK_PB2 1 &pcfg_pull_none_smt>;
728 				rockchip,pins = <0 RK_PC2 2 &pcfg_pull_none>,
729 						<0 RK_PC6 3 &pcfg_pull_none>;
733 				rockchip,pins = <0 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>,
734 						<0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
752 				rockchip,pins = <0 RK_PB6 1 &pcfg_pull_none>,
753 						<0 RK_PC4 2 &pcfg_pull_none>;
759 				rockchip,pins = <0 RK_PC5 1 &pcfg_pull_none>;
765 				rockchip,pins = <0 RK_PC4 1 &pcfg_pull_none>;
771 				rockchip,pins = <0 RK_PC6 1 &pcfg_pull_none>;
777 				rockchip,pins = <0 RK_PC0 1 &pcfg_pull_none>;
815 				rockchip,pins = <0 RK_PA1 1 &pcfg_pull_up_drv_4ma>;
850 				rockchip,pins = <0 RK_PA3 1 &pcfg_pull_up>;
854 				rockchip,pins = <0 RK_PA4 1 &pcfg_pull_up>;
858 				rockchip,pins = <0 RK_PB0 1 &pcfg_pull_up>;
862 				rockchip,pins = <0 RK_PA7 1 &pcfg_pull_up>;
868 				rockchip,pins = <0 RK_PB7 1 &pcfg_pull_none>;
872 				rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;