Lines Matching +full:remote +full:- +full:bus
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
9 #include "rv1106-evb-v10.dtsi"
10 #include "rv1106-thunder-boot-emmc.dtsi"
14 compatible = "rockchip,rv1106g-evb2-v11-emmc", "rockchip,rv1106";
20 vcc_1v8: vcc-1v8 {
21 compatible = "regulator-fixed";
22 regulator-name = "vcc_1v8";
23 regulator-always-on;
24 regulator-boot-on;
25 regulator-min-microvolt = <1800000>;
26 regulator-max-microvolt = <1800000>;
29 vcc_3v3: vcc-3v3 {
30 compatible = "regulator-fixed";
31 regulator-name = "vcc_3v3";
32 regulator-always-on;
33 regulator-boot-on;
34 regulator-min-microvolt = <3300000>;
35 regulator-max-microvolt = <3300000>;
38 vcc3v3_sd: vcc3v3-sd {
39 compatible = "regulator-fixed";
41 regulator-name = "vcc3v3_sd";
42 regulator-min-microvolt = <3300000>;
43 regulator-max-microvolt = <3300000>;
44 pinctrl-names = "default";
45 pinctrl-0 = <&sdmmc_pwren>;
48 wireless_wlan: wireless-wlan {
49 compatible = "wlan-platdata";
63 #address-cells = <1>;
64 #size-cells = <0>;
68 #address-cells = <1>;
69 #size-cells = <0>;
73 remote-endpoint = <&sc3338_out>;
74 data-lanes = <1 2>;
80 #address-cells = <1>;
81 #size-cells = <0>;
85 remote-endpoint = <&mipi_csi2_input>;
97 pinctrl-names = "default";
98 pinctrl-0 = <&uart2m1_xfer>;
102 rockchip,amp-shared;
109 clock-names = "xvclk";
110 pwdn-gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>;
111 pinctrl-names = "default";
112 pinctrl-0 = <&mipi_refclk_out0>;
113 rockchip,camera-module-index = <0>;
114 rockchip,camera-module-facing = "back";
115 rockchip,camera-module-name = "FKO1";
116 rockchip,camera-module-lens-name = "30IRC-F16";
119 remote-endpoint = <&csi_dphy_input0>;
120 data-lanes = <1 2>;
130 #address-cells = <1>;
131 #size-cells = <0>;
135 #address-cells = <1>;
136 #size-cells = <0>;
140 remote-endpoint = <&csi_dphy_output>;
146 #address-cells = <1>;
147 #size-cells = <0>;
151 remote-endpoint = <&cif_mipi_in>;
167 memory-region-thunderboot = <&rkisp_thunderboot>;
169 pinctrl-names = "default";
170 pinctrl-0 = <&mipi_pins>;
172 /* MIPI CSI-2 endpoint */
174 remote-endpoint = <&mipi_csi2_output>;
183 /* MIPI CSI-2 endpoint */
185 remote-endpoint = <&isp_in>;
199 remote-endpoint = <&mipi_lvds_sditf>;
227 /omit-if-no-ref/
228 sdmmc_pwren: sdmmc-pwren {
243 max-frequency = <50000000>;
244 bus-width = <1>;
245 cap-sd-highspeed;
246 cap-sdio-irq;
247 keep-power-in-suspend;
248 non-removable;
249 rockchip,default-sample-phase = <90>;
250 no-sd;
251 no-mmc;
252 supports-sdio;
253 pinctrl-names = "default";
254 pinctrl-0 = <&sdmmc1m0_cmd &sdmmc1m0_clk &sdmmc1m0_bus4>;
259 max-frequency = <200000000>;
260 no-sdio;
261 no-mmc;
262 bus-width = <4>;
263 cap-mmc-highspeed;
264 cap-sd-highspeed;
265 disable-wp;
266 pinctrl-names = "normal", "idle";
267 pinctrl-0 = <&sdmmc0_clk &sdmmc0_cmd &sdmmc0_det &sdmmc0_bus4>;
268 pinctrl-1 = <&sdmmc0_idle_pins &sdmmc0_det>;
269 vmmc-supply = <&vcc3v3_sd>;
274 assigned-clocks = <&cru SCLK_SFC>;
275 assigned-clock-rates = <125000000>;
279 compatible = "jedec,spi-nor";
281 spi-max-frequency = <125000000>;
282 spi-rx-bus-width = <4>;
283 spi-tx-bus-width = <1>;