boot/dts/rk3288-th804-avb.dts

4  * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
8 #include "rk3288-th804.dtsi"
12 	compatible = "rockchip,rk3288-th804", "rockchip,rk3288";
16 	vcc_camera: vcc-camera-regulator {
17 		compatible = "regulator-fixed";
19 		pinctrl-names = "default";
20 		pinctrl-0 = <&camera_pwr>;
21 		regulator-name = "vcc_camera";
22 		enable-active-high;
23 		regulator-always-on;
24 		regulator-boot-on;
31 	dvp-supply = <&vcc_18>;
32 	sdcard-supply = <&vccio_sd>;
33 	wifi-supply = <&vccio_wl>;
47 		clock-names = "xvclk";
49 		/*power-gpio = <&gpio0 RK_PC1 GPIO_ACTIVE_HIGH>; */
50 		pwdn-gpios = <&gpio2 RK_PB6 GPIO_ACTIVE_HIGH>;
52 		rockchip,camera-module-index = <1>;
53 		rockchip,camera-module-facing = "front";
54 		rockchip,camera-module-name = "CameraKing";
55 		rockchip,camera-module-lens-name = "Largan";
58 				remote-endpoint = <&isp_dvp_in>;
67 		clock-names = "xvclk";
69 		rockchip,camera-module-index = <0>;
70 		rockchip,camera-module-facing = "back";
71 		rockchip,camera-module-name = "CameraKing";
72 		rockchip,camera-module-lens-name = "Largan-9569A2";
73 		/*power-gpio = <&gpio0 RK_PC1 GPIO_ACTIVE_HIGH>; */
74 		pwdn-gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>;
77 				remote-endpoint = <&th_mipi_in>;
78 				data-lanes = <1 2>;
89 		#address-cells = <1>;
90 		#size-cells = <0>;
94 			#address-cells = <1>;
95 			#size-cells = <0>;
99 				remote-endpoint = <&ov8858_out>;
100 				data-lanes = <1 2>;
106 			#address-cells = <1>;
107 			#size-cells = <0>;
111 				remote-endpoint = <&isp_mipi_in>;
119 		camera_pwr: camera-pwr {
124 	pcfg_pull_none_4ma: pcfg-pull-none-4ma {
125 		bias-disable;
126 		drive-strength = <4>;
130 		isp_mipi: isp-mipi {
136 		isp_dvp_d2d9: isp-d2d9 {
152 		isp_dvp_d0d1: isp-d0d1 {
163 	pinctrl-names = "default";
164 	pinctrl-0 = <&isp_dvp_d2d9 &isp_dvp_d0d1 &isp_mipi>;
166 		#address-cells = <1>;
167 		#size-cells = <0>;
171 			remote-endpoint = <&gc2145_out>;
176 			remote-endpoint = <&dphy_rx_out>;
183 	assigned-clocks = <&cru DCLK_VOP0>;
184 	assigned-clock-parents = <&cru PLL_CPLL>;
188 	assigned-clocks = <&cru DCLK_VOP1>;
189 	assigned-clock-parents = <&cru PLL_GPLL>;