Lines Matching +full:0 +full:x10180000
38 #size-cells = <0>;
44 reg = <0xf00>;
53 reg = <0xf01>;
99 reg = <0x20078000 0x4000>;
100 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
141 #clock-cells = <0>;
146 reg = <0x10080000 0x2000>;
149 ranges = <0 0x10080000 0x2000>;
151 smp-sram@0 {
153 reg = <0x00 0x10>;
159 reg = <0x10090000 0x10000>;
212 rockchip,grf-offset = <0x0144>;
213 rockchip,grf-values = <0x0008000a>, <0x00080002>;
220 reg = <0x10108400 0x400>;
225 rockchip,normal-rates = <297000000>, <0>;
234 rockchip,taskqueue-node = <0>;
235 rockchip,resetgroup-node = <0>;
241 reg = <0x10108800 0x100>;
246 #iommu-cells = <0>;
253 reg = <0x1010c000 0x400>;
258 rockchip,normal-rates = <297000000>, <0>, <200000000>;
266 rockchip,taskqueue-node = <0>;
267 rockchip,resetgroup-node = <0>;
274 reg = <0x1010c440 0x40>, <0x1010c480 0x40>;
279 #iommu-cells = <0>;
286 reg = <0x10118000 0x19c>;
297 #size-cells = <0>;
298 vop_out_hdmi: endpoint@0 {
299 reg = <0>;
311 reg = <0x10118200 0x100>;
314 rockchip,saturation = <0x00386346>;
315 rockchip,brightcontrast = <0x00008b00>;
316 rockchip,adjtiming = <0xa6c00880>;
317 rockchip,lumafilter0 = <0x02ff0000>;
318 rockchip,lumafilter1 = <0xf40202fd>;
319 rockchip,lumafilter2 = <0xf332d919>;
320 rockchip,daclevel = <0x3e>;
327 #size-cells = <0>;
328 tve_in_vop: endpoint@0 {
329 reg = <0>;
338 reg = <0x10118300 0x100>;
343 #iommu-cells = <0>;
349 reg = <0x0 0x1012e000 0x0 0x20>;
356 #address-cells = <0>;
358 reg = <0x10139000 0x1000>,
359 <0x1013a000 0x2000>,
360 <0x1013c000 0x2000>,
361 <0x1013e000 0x2000>;
368 reg = <0x10180000 0x40000>;
382 reg = <0x101c0000 0x40000>;
392 reg = <0x10200000 0x4000>;
395 #size-cells = <0>;
413 reg = <0x10204000 0x1000>;
420 pinctrl-0 = <&spdif_out>;
421 #sound-dai-cells = <0>;
427 reg = <0x10208000 0x200>;
436 reg = <0x10214000 0x4000>;
441 fifo-depth = <0x100>;
452 reg = <0x10218000 0x4000>;
457 fifo-depth = <0x100>;
468 reg = <0x1021c000 0x4000>;
481 fifo-depth = <0x100>;
486 pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>;
494 reg = <0x10220000 0x4000>;
500 dmas = <&pdma 0>, <&pdma 1>;
505 pinctrl-0 = <&i2s_mclk
511 #sound-dai-cells = <0>;
517 reg = <0x20000000 0x1000>;
527 reg = <0x20008000 0x1000>;
533 offset = <0x1d8>;
545 #size-cells = <0>;
562 reg = <0x017c 0x0c>;
565 #clock-cells = <0>;
570 #phy-cells = <0>;
580 #phy-cells = <0>;
590 reg = <0x20030000 0x4000>;
599 reg = <0x20034000 0x4000>;
605 pinctrl-0 = <&hdmi_ctl>;
607 #size-cells = <0>;
608 #sound-dai-cells = <0>;
613 #size-cells = <0>;
614 hdmi_in_vop: endpoint@0 {
615 reg = <0>;
623 reg = <0x20044000 0x20>;
631 reg = <0x2004c000 0x100>;
638 reg = <0x20050000 0x10>;
643 pinctrl-0 = <&pwm0_pin>;
649 reg = <0x20050010 0x10>;
654 pinctrl-0 = <&pwm1_pin>;
660 reg = <0x20050020 0x10>;
665 pinctrl-0 = <&pwm2_pin>;
671 reg = <0x20050030 0x10>;
677 pinctrl-0 = <&pwm3_pin>;
683 reg = <0x20056000 0x1000>;
686 #size-cells = <0>;
690 pinctrl-0 = <&i2c1_xfer>;
696 reg = <0x2005a000 0x1000>;
699 #size-cells = <0>;
703 pinctrl-0 = <&i2c2_xfer>;
709 reg = <0x20060000 0x100>;
717 pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>;
723 reg = <0x20064000 0x100>;
731 pinctrl-0 = <&uart1_xfer>;
737 reg = <0x20068000 0x100>;
745 pinctrl-0 = <&uart2_xfer>;
751 reg = <0x20072000 0x1000>;
754 #size-cells = <0>;
758 pinctrl-0 = <&i2c0_xfer>;
764 reg = <0x20074000 0x1000>;
771 pinctrl-0 = <&spi_txd &spi_rxd &spi_clk &spi_cs0>;
773 #size-cells = <0>;
786 reg = <0x2007c000 0x100>;
800 reg = <0x20080000 0x100>;
814 reg = <0x20084000 0x100>;
836 rockchip,pins = <0 RK_PA0 2 &pcfg_pull_default>;
842 rockchip,pins = <0 RK_PA1 2 &pcfg_pull_default>;
848 rockchip,pins = <0 RK_PA1 2 &pcfg_pull_default>;
854 rockchip,pins = <0 RK_PD3 1 &pcfg_pull_default>;
885 rockchip,pins = <0 RK_PB3 1 &pcfg_pull_default>;
889 rockchip,pins = <0 RK_PB3 1 &pcfg_pull_default>,
890 <0 RK_PB4 1 &pcfg_pull_default>,
891 <0 RK_PB5 1 &pcfg_pull_default>,
892 <0 RK_PB6 1 &pcfg_pull_default>;
896 rockchip,pins = <0 RK_PB0 1 &pcfg_pull_default>;
900 rockchip,pins = <0 RK_PB1 1 &pcfg_pull_none>;
931 rockchip,pins = <0 RK_PD4 1 &pcfg_pull_default>;
955 rockchip,pins = <0 RK_PA0 1 &pcfg_pull_none>,
956 <0 RK_PA1 1 &pcfg_pull_none>;
962 rockchip,pins = <0 RK_PA2 1 &pcfg_pull_none>,
963 <0 RK_PA3 1 &pcfg_pull_none>;
1006 rockchip,pins = <0 RK_PC0 1 &pcfg_pull_default>,
1007 <0 RK_PC1 1 &pcfg_pull_default>;
1011 rockchip,pins = <0 RK_PC2 1 &pcfg_pull_default>;
1015 rockchip,pins = <0 RK_PC3 1 &pcfg_pull_none>;