Lines Matching +full:power +full:- +full:controller
1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the R-Car H1 (R8A77790) SoC
9 #include <dt-bindings/clock/r8a7779-clock.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/power/r8a7779-sysc.h>
16 interrupt-parent = <&gic>;
17 #address-cells = <1>;
18 #size-cells = <1>;
21 #address-cells = <1>;
22 #size-cells = <0>;
26 compatible = "arm,cortex-a9";
28 clock-frequency = <1000000000>;
33 compatible = "arm,cortex-a9";
35 clock-frequency = <1000000000>;
37 power-domains = <&sysc R8A7779_PD_ARM1>;
41 compatible = "arm,cortex-a9";
43 clock-frequency = <1000000000>;
45 power-domains = <&sysc R8A7779_PD_ARM2>;
49 compatible = "arm,cortex-a9";
51 clock-frequency = <1000000000>;
53 power-domains = <&sysc R8A7779_PD_ARM3>;
63 gic: interrupt-controller@f0001000 {
64 compatible = "arm,cortex-a9-gic";
65 #interrupt-cells = <3>;
66 interrupt-controller;
72 compatible = "arm,cortex-a9-global-timer";
80 compatible = "arm,cortex-a9-twd-timer";
88 compatible = "renesas,gpio-r8a7779", "renesas,rcar-gen1-gpio";
91 #gpio-cells = <2>;
92 gpio-controller;
93 gpio-ranges = <&pfc 0 0 32>;
94 #interrupt-cells = <2>;
95 interrupt-controller;
99 compatible = "renesas,gpio-r8a7779", "renesas,rcar-gen1-gpio";
102 #gpio-cells = <2>;
103 gpio-controller;
104 gpio-ranges = <&pfc 0 32 32>;
105 #interrupt-cells = <2>;
106 interrupt-controller;
110 compatible = "renesas,gpio-r8a7779", "renesas,rcar-gen1-gpio";
113 #gpio-cells = <2>;
114 gpio-controller;
115 gpio-ranges = <&pfc 0 64 32>;
116 #interrupt-cells = <2>;
117 interrupt-controller;
121 compatible = "renesas,gpio-r8a7779", "renesas,rcar-gen1-gpio";
124 #gpio-cells = <2>;
125 gpio-controller;
126 gpio-ranges = <&pfc 0 96 32>;
127 #interrupt-cells = <2>;
128 interrupt-controller;
132 compatible = "renesas,gpio-r8a7779", "renesas,rcar-gen1-gpio";
135 #gpio-cells = <2>;
136 gpio-controller;
137 gpio-ranges = <&pfc 0 128 32>;
138 #interrupt-cells = <2>;
139 interrupt-controller;
143 compatible = "renesas,gpio-r8a7779", "renesas,rcar-gen1-gpio";
146 #gpio-cells = <2>;
147 gpio-controller;
148 gpio-ranges = <&pfc 0 160 32>;
149 #interrupt-cells = <2>;
150 interrupt-controller;
154 compatible = "renesas,gpio-r8a7779", "renesas,rcar-gen1-gpio";
157 #gpio-cells = <2>;
158 gpio-controller;
159 gpio-ranges = <&pfc 0 192 9>;
160 #interrupt-cells = <2>;
161 interrupt-controller;
164 irqpin0: interrupt-controller@fe78001c {
165 compatible = "renesas,intc-irqpin-r8a7779", "renesas,intc-irqpin";
166 #interrupt-cells = <2>;
168 interrupt-controller;
179 sense-bitfield-width = <2>;
183 #address-cells = <1>;
184 #size-cells = <0>;
185 compatible = "renesas,i2c-r8a7779", "renesas,rcar-gen1-i2c";
189 power-domains = <&sysc R8A7779_PD_ALWAYS_ON>;
194 #address-cells = <1>;
195 #size-cells = <0>;
196 compatible = "renesas,i2c-r8a7779", "renesas,rcar-gen1-i2c";
200 power-domains = <&sysc R8A7779_PD_ALWAYS_ON>;
205 #address-cells = <1>;
206 #size-cells = <0>;
207 compatible = "renesas,i2c-r8a7779", "renesas,rcar-gen1-i2c";
211 power-domains = <&sysc R8A7779_PD_ALWAYS_ON>;
216 #address-cells = <1>;
217 #size-cells = <0>;
218 compatible = "renesas,i2c-r8a7779", "renesas,rcar-gen1-i2c";
222 power-domains = <&sysc R8A7779_PD_ALWAYS_ON>;
227 compatible = "renesas,scif-r8a7779", "renesas,rcar-gen1-scif",
233 clock-names = "fck", "brg_int", "scif_clk";
234 power-domains = <&sysc R8A7779_PD_ALWAYS_ON>;
239 compatible = "renesas,scif-r8a7779", "renesas,rcar-gen1-scif",
245 clock-names = "fck", "brg_int", "scif_clk";
246 power-domains = <&sysc R8A7779_PD_ALWAYS_ON>;
251 compatible = "renesas,scif-r8a7779", "renesas,rcar-gen1-scif",
257 clock-names = "fck", "brg_int", "scif_clk";
258 power-domains = <&sysc R8A7779_PD_ALWAYS_ON>;
263 compatible = "renesas,scif-r8a7779", "renesas,rcar-gen1-scif",
269 clock-names = "fck", "brg_int", "scif_clk";
270 power-domains = <&sysc R8A7779_PD_ALWAYS_ON>;
275 compatible = "renesas,scif-r8a7779", "renesas,rcar-gen1-scif",
281 clock-names = "fck", "brg_int", "scif_clk";
282 power-domains = <&sysc R8A7779_PD_ALWAYS_ON>;
287 compatible = "renesas,scif-r8a7779", "renesas,rcar-gen1-scif",
293 clock-names = "fck", "brg_int", "scif_clk";
294 power-domains = <&sysc R8A7779_PD_ALWAYS_ON>;
299 compatible = "renesas,hscif-r8a7779",
300 "renesas,rcar-gen1-hscif", "renesas,hscif";
306 clock-names = "fck", "brg_int", "scif_clk";
307 power-domains = <&sysc R8A7779_PD_ALWAYS_ON>;
312 compatible = "renesas,hscif-r8a7779",
313 "renesas,rcar-gen1-hscif", "renesas,hscif";
319 clock-names = "fck", "brg_int", "scif_clk";
320 power-domains = <&sysc R8A7779_PD_ALWAYS_ON>;
325 compatible = "renesas,pfc-r8a7779";
330 compatible = "renesas,thermal-r8a7779", "renesas,rcar-thermal";
335 compatible = "renesas,tmu-r8a7779", "renesas,tmu";
341 clock-names = "fck";
342 power-domains = <&sysc R8A7779_PD_ALWAYS_ON>;
350 compatible = "renesas,tmu-r8a7779", "renesas,tmu";
356 clock-names = "fck";
357 power-domains = <&sysc R8A7779_PD_ALWAYS_ON>;
365 compatible = "renesas,tmu-r8a7779", "renesas,tmu";
371 clock-names = "fck";
372 power-domains = <&sysc R8A7779_PD_ALWAYS_ON>;
380 compatible = "renesas,sata-r8a7779";
384 power-domains = <&sysc R8A7779_PD_ALWAYS_ON>;
389 compatible = "renesas,sdhi-r8a7779",
390 "renesas,rcar-gen1-sdhi";
394 power-domains = <&sysc R8A7779_PD_ALWAYS_ON>;
399 compatible = "renesas,sdhi-r8a7779",
400 "renesas,rcar-gen1-sdhi";
404 power-domains = <&sysc R8A7779_PD_ALWAYS_ON>;
409 compatible = "renesas,sdhi-r8a7779",
410 "renesas,rcar-gen1-sdhi";
414 power-domains = <&sysc R8A7779_PD_ALWAYS_ON>;
419 compatible = "renesas,sdhi-r8a7779",
420 "renesas,rcar-gen1-sdhi";
424 power-domains = <&sysc R8A7779_PD_ALWAYS_ON>;
429 compatible = "renesas,hspi-r8a7779", "renesas,hspi";
432 #address-cells = <1>;
433 #size-cells = <0>;
435 power-domains = <&sysc R8A7779_PD_ALWAYS_ON>;
440 compatible = "renesas,hspi-r8a7779", "renesas,hspi";
443 #address-cells = <1>;
444 #size-cells = <0>;
446 power-domains = <&sysc R8A7779_PD_ALWAYS_ON>;
451 compatible = "renesas,hspi-r8a7779", "renesas,hspi";
454 #address-cells = <1>;
455 #size-cells = <0>;
457 power-domains = <&sysc R8A7779_PD_ALWAYS_ON>;
462 compatible = "renesas,du-r8a7779";
466 clock-names = "du.0";
467 power-domains = <&sysc R8A7779_PD_ALWAYS_ON>;
471 #address-cells = <1>;
472 #size-cells = <0>;
488 #address-cells = <1>;
489 #size-cells = <1>;
494 compatible = "fixed-clock";
495 #clock-cells = <0>;
497 clock-frequency = <0>;
502 compatible = "fixed-clock";
503 #clock-cells = <0>;
505 clock-frequency = <0>;
510 compatible = "renesas,r8a7779-cpg-clocks";
513 #clock-cells = <1>;
514 clock-output-names = "plla", "z", "zs", "s",
516 #power-domain-cells = <0>;
521 compatible = "fixed-factor-clock";
523 #clock-cells = <0>;
524 clock-div = <2>;
525 clock-mult = <1>;
528 compatible = "fixed-factor-clock";
530 #clock-cells = <0>;
531 clock-div = <8>;
532 clock-mult = <1>;
535 compatible = "fixed-factor-clock";
537 #clock-cells = <0>;
538 clock-div = <16>;
539 clock-mult = <1>;
542 compatible = "fixed-factor-clock";
544 #clock-cells = <0>;
545 clock-div = <24>;
546 clock-mult = <1>;
551 compatible = "renesas,r8a7779-mstp-clocks",
552 "renesas,cpg-mstp-clocks";
570 #clock-cells = <1>;
571 clock-indices = <
581 clock-output-names =
588 compatible = "renesas,r8a7779-mstp-clocks",
589 "renesas,cpg-mstp-clocks";
601 #clock-cells = <1>;
602 clock-indices = <
609 clock-output-names =
617 compatible = "renesas,r8a7779-mstp-clocks",
618 "renesas,cpg-mstp-clocks";
622 #clock-cells = <1>;
623 clock-indices = <
628 clock-output-names =
639 rst: reset-controller@ffcc0000 {
640 compatible = "renesas,r8a7779-reset-wdt";
644 sysc: system-controller@ffd85000 {
645 compatible = "renesas,r8a7779-sysc";
647 #power-domain-cells = <1>;