boot/dts/r8a7779.dtsi

22 		#size-cells = <0>;
24 		cpu@0 {
27 			reg = <0>;
67 		reg = <0xf0001000 0x1000>,
68 		      <0xf0000100 0x100>;
73 		reg = <0xf0000200 0x100>;
81 		reg = <0xf0000600 0x20>;
89 		reg = <0xffc40000 0x2c>;
93 		gpio-ranges = <&pfc 0 0 32>;
100 		reg = <0xffc41000 0x2c>;
104 		gpio-ranges = <&pfc 0 32 32>;
111 		reg = <0xffc42000 0x2c>;
115 		gpio-ranges = <&pfc 0 64 32>;
122 		reg = <0xffc43000 0x2c>;
126 		gpio-ranges = <&pfc 0 96 32>;
133 		reg = <0xffc44000 0x2c>;
137 		gpio-ranges = <&pfc 0 128 32>;
144 		reg = <0xffc45000 0x2c>;
148 		gpio-ranges = <&pfc 0 160 32>;
155 		reg = <0xffc46000 0x2c>;
159 		gpio-ranges = <&pfc 0 192 9>;
169 		reg = <0xfe78001c 4>,
170 			<0xfe780010 4>,
171 			<0xfe780024 4>,
172 			<0xfe780044 4>,
173 			<0xfe780064 4>,
174 			<0xfe780000 4>;
184 		#size-cells = <0>;
186 		reg = <0xffc70000 0x1000>;
195 		#size-cells = <0>;
197 		reg = <0xffc71000 0x1000>;
206 		#size-cells = <0>;
208 		reg = <0xffc72000 0x1000>;
217 		#size-cells = <0>;
219 		reg = <0xffc73000 0x1000>;
229 		reg = <0xffe40000 0x100>;
241 		reg = <0xffe41000 0x100>;
253 		reg = <0xffe42000 0x100>;
265 		reg = <0xffe43000 0x100>;
277 		reg = <0xffe44000 0x100>;
289 		reg = <0xffe45000 0x100>;
301 		reg = <0xffe48000 96>;
314 		reg = <0xffe49000 96>;
326 		reg = <0xfffc0000 0x23c>;
331 		reg = <0xffc48000 0x38>;
336 		reg = <0xffd80000 0x30>;
351 		reg = <0xffd81000 0x30>;
366 		reg = <0xffd82000 0x30>;
381 		reg = <0xfc600000 0x200000>;
391 		reg = <0xffe4c000 0x100>;
401 		reg = <0xffe4d000 0x100>;
411 		reg = <0xffe4e000 0x100>;
421 		reg = <0xffe4f000 0x100>;
430 		reg = <0xfffc7000 0x18>;
433 		#size-cells = <0>;
441 		reg = <0xfffc8000 0x18>;
444 		#size-cells = <0>;
452 		reg = <0xfffc6000 0x18>;
455 		#size-cells = <0>;
463 		reg = <0xfff80000 0x40000>;
466 		clock-names = "du.0";
472 			#size-cells = <0>;
474 			port@0 {
475 				reg = <0>;
495 			#clock-cells = <0>;
497 			clock-frequency = <0>;
503 			#clock-cells = <0>;
505 			clock-frequency = <0>;
511 			reg = <0xffc80000 0x30>;
516 			#power-domain-cells = <0>;
523 			#clock-cells = <0>;
530 			#clock-cells = <0>;
537 			#clock-cells = <0>;
544 			#clock-cells = <0>;
553 			reg = <0xffc80030 4>;
590 			reg = <0xffc80034 4>, <0xffc80044 4>;
619 			reg = <0xffc8003c 4>;
636 		reg = <0xff000044 4>;
641 		reg = <0xffcc0000 0x48>;
646 		reg = <0xffd85000 0x0200>;