boot/dts/r8a7778.dtsi

26 		#size-cells = <0>;
28 		cpu@0 {
31 			reg = <0>;
47 		ranges = <0 0 0x1c000000>;
53 		reg = <0xfde00000 0x400>;
59 		#size-cells = <0>;
67 		reg = <0xfe438000 0x1000>,
68 		      <0xfe430000 0x100>;
77 		reg =	<0xfe78001c 4>,
78 			<0xfe780010 4>,
79 			<0xfe780024 4>,
80 			<0xfe780044 4>,
81 			<0xfe780064 4>,
82 			<0xfe780000 4>;
92 		reg = <0xffc40000 0x2c>;
96 		gpio-ranges = <&pfc 0 0 32>;
103 		reg = <0xffc41000 0x2c>;
107 		gpio-ranges = <&pfc 0 32 32>;
114 		reg = <0xffc42000 0x2c>;
118 		gpio-ranges = <&pfc 0 64 32>;
125 		reg = <0xffc43000 0x2c>;
129 		gpio-ranges = <&pfc 0 96 32>;
136 		reg = <0xffc44000 0x2c>;
140 		gpio-ranges = <&pfc 0 128 27>;
147 		reg = <0xfffc0000 0x118>;
152 		#size-cells = <0>;
154 		reg = <0xffc70000 0x1000>;
163 		#size-cells = <0>;
165 		reg = <0xffc71000 0x1000>;
174 		#size-cells = <0>;
176 		reg = <0xffc72000 0x1000>;
185 		#size-cells = <0>;
187 		reg = <0xffc73000 0x1000>;
196 		reg = <0xffd80000 0x30>;
211 		reg = <0xffd81000 0x30>;
226 		reg = <0xffd82000 0x30>;
243 		 * Single DAI : #sound-dai-cells = <0>;         <&rcar_sound>;
247 		reg =	<0xffd90000 0x1000>,	/* SRU */
248 			<0xffd91000 0x240>,	/* SSI */
249 			<0xfffe0000 0x24>;	/* ADG */
271 			"ssi.3", "ssi.2", "ssi.1", "ssi.0",
273 			"src.3", "src.2", "src.1", "src.0",
289 			ssi3: ssi-3 { interrupts = <GIC_SPI 0x85 IRQ_TYPE_LEVEL_HIGH>; };
290 			ssi4: ssi-4 { interrupts = <GIC_SPI 0x85 IRQ_TYPE_LEVEL_HIGH>; };
291 			ssi5: ssi-5 { interrupts = <GIC_SPI 0x86 IRQ_TYPE_LEVEL_HIGH>; };
292 			ssi6: ssi-6 { interrupts = <GIC_SPI 0x86 IRQ_TYPE_LEVEL_HIGH>; };
293 			ssi7: ssi-7 { interrupts = <GIC_SPI 0x86 IRQ_TYPE_LEVEL_HIGH>; };
294 			ssi8: ssi-8 { interrupts = <GIC_SPI 0x86 IRQ_TYPE_LEVEL_HIGH>; };
295 			ssi9: ssi-9 { interrupts = <GIC_SPI 0x86 IRQ_TYPE_LEVEL_HIGH>; };
302 		reg = <0xffe40000 0x100>;
314 		reg = <0xffe41000 0x100>;
326 		reg = <0xffe42000 0x100>;
338 		reg = <0xffe43000 0x100>;
350 		reg = <0xffe44000 0x100>;
362 		reg = <0xffe45000 0x100>;
374 		reg = <0xffe48000 96>;
386 		reg = <0xffe49000 96>;
397 		reg = <0xffe4e000 0x100>;
407 		reg = <0xffe4c000 0x100>;
417 		reg = <0xffe4d000 0x100>;
427 		reg = <0xffe4f000 0x100>;
436 		reg = <0xfffc7000 0x18>;
441 		#size-cells = <0>;
447 		reg = <0xfffc8000 0x18>;
452 		#size-cells = <0>;
458 		reg = <0xfffc6000 0x18>;
463 		#size-cells = <0>;
475 			#clock-cells = <0>;
476 			clock-frequency = <0>;
482 			#clock-cells = <0>;
484 			clock-frequency = <0>;
490 			reg = <0xffc80000 0x80>;
495 			#power-domain-cells = <0>;
501 			#clock-cells = <0>;
502 			clock-frequency = <0>;
506 			#clock-cells = <0>;
507 			clock-frequency = <0>;
511 			#clock-cells = <0>;
512 			clock-frequency = <0>;
519 			#clock-cells = <0>;
526 			#clock-cells = <0>;
533 			#clock-cells = <0>;
540 			#clock-cells = <0>;
547 			#clock-cells = <0>;
555 			reg = <0xffc80030 4>;
600 			reg = <0xffc80034 4>, <0xffc80044 4>;
615 			reg = <0xffc8003c 4>;
639 			reg = <0xffc80054 4>;
666 		reg = <0xffcc0000 0x40>;