boot/dts/r8a73a4.dtsi

27 			clocks = <&cpg_clocks R8A73A4_CLK_Z>;
35 			clocks = <&cpg_clocks R8A73A4_CLK_Z>;
43 			clocks = <&cpg_clocks R8A73A4_CLK_Z2>;
523 		cpg_clocks: cpg_clocks@e6150000 {  label
539 				 <&cpg_clocks R8A73A4_CLK_PLL2S>, <0>;
546 			clocks = <&pll1_div2_clk>, <&cpg_clocks R8A73A4_CLK_PLL2S>,
553 			clocks = <&pll1_div2_clk>, <&cpg_clocks R8A73A4_CLK_PLL2S>,
560 			clocks = <&pll1_div2_clk>, <&cpg_clocks R8A73A4_CLK_PLL2S>,
567 			clocks = <&pll1_div2_clk>, <&cpg_clocks R8A73A4_CLK_PLL2S>,
574 			clocks = <&pll1_div2_clk>, <&cpg_clocks R8A73A4_CLK_PLL2S>,
581 			clocks = <&pll1_div2_clk>, <&cpg_clocks R8A73A4_CLK_PLL2S>,
589 			clocks = <&pll1_div2_clk>, <&cpg_clocks R8A73A4_CLK_PLL2S>,
597 			clocks = <&pll1_div2_clk>, <&cpg_clocks R8A73A4_CLK_PLL2S>,
605 			clocks = <&pll1_div2_clk>, <&cpg_clocks R8A73A4_CLK_PLL2S>,
613 			clocks = <&pll1_div2_clk>, <&cpg_clocks R8A73A4_CLK_PLL2S>,
621 			clocks = <&pll1_div2_clk>, <&cpg_clocks R8A73A4_CLK_PLL2S>,
628 			clocks = <&pll1_div2_clk>, <&cpg_clocks R8A73A4_CLK_PLL2S>,
635 			clocks = <&pll1_div2_clk>, <&cpg_clocks R8A73A4_CLK_PLL2S>,
642 			clocks = <&cpg_clocks R8A73A4_CLK_PLL2S>;
648 			clocks = <&cpg_clocks R8A73A4_CLK_PLL2H>, <&pll1_div2_clk>,
649 				 <&cpg_clocks R8A73A4_CLK_PLL2S>, <0>;
655 			clocks = <&pll1_div2_clk>, <&cpg_clocks R8A73A4_CLK_PLL2S>,
663 			clocks = <&cpg_clocks R8A73A4_CLK_MAIN>;
670 			clocks = <&cpg_clocks R8A73A4_CLK_PLL0>;
677 			clocks = <&cpg_clocks R8A73A4_CLK_PLL1>;
695 				 <&mp_clk>, <&mp_clk>, <&cpg_clocks R8A73A4_CLK_HP>;
710 			clocks = <&cpg_clocks R8A73A4_CLK_HP>, <&mmc1_clk>,
712 				 <&mmc0_clk>, <&cpg_clocks R8A73A4_CLK_HP>,
713 				 <&cpg_clocks R8A73A4_CLK_HP>, <&cpg_clocks
714 				 R8A73A4_CLK_HP>, <&cpg_clocks
733 			clocks = <&main_div2_clk>, <&cpg_clocks R8A73A4_CLK_ZS>,
735 				 <&cpg_clocks R8A73A4_CLK_HP>,
736 				 <&cpg_clocks R8A73A4_CLK_HP>;
749 			clocks = <&extal2_clk>, <&cpg_clocks R8A73A4_CLK_HP>;