boot/dts/picoxcell-pc3x2.dtsi

1 // SPDX-License-Identifier: GPL-2.0-only
8 	#address-cells = <1>;
9 	#size-cells = <1>;
12 		#address-cells = <0>;
13 		#size-cells = <0>;
16 			compatible = "arm,arm1176jz-s";
18 			clock-frequency = <400000000>;
19 			d-cache-line-size = <32>;
20 			d-cache-size = <32768>;
21 			i-cache-line-size = <32>;
22 			i-cache-size = <32768>;
27 		#address-cells = <1>;
28 		#size-cells = <1>;
32 			compatible = "fixed-clock";
33 			clock-outputs = "bus", "pclk";
34 			clock-frequency = <200000000>;
35 			ref-clock = <&ref_clk>, "ref";
40 		compatible = "simple-bus";
41 		#address-cells = <1>;
42 		#size-cells = <1>;
48 			interrupt-parent = <&vic0>;
53 			compatible = "snps,dw-dmac";
55 			interrupt-parent = <&vic0>;
60 			compatible = "snps,dw-dmac";
62 			interrupt-parent = <&vic0>;
66 		vic0: interrupt-controller@60000 {
67 			compatible = "arm,pl192-vic";
68 			interrupt-controller;
70 			#interrupt-cells = <1>;
73 		vic1: interrupt-controller@64000 {
74 			compatible = "arm,pl192-vic";
75 			interrupt-controller;
77 			#interrupt-cells = <1>;
80 		fuse: picoxcell-fuse@80000 {
81 			compatible = "picoxcell,fuse-pc3x2";
85 		ssi: picoxcell-spi@90000 {
88 			interrupt-parent = <&vic0>;
93 			compatible = "picochip,spacc-ipsec";
95 			interrupt-parent = <&vic0>;
97 			ref-clock = <&pclk>, "ref";
101 			compatible = "picochip,spacc-srtp";
103 			interrupt-parent = <&vic0>;
108 			compatible = "picochip,spacc-l2";
110 			interrupt-parent = <&vic0>;
112 			ref-clock = <&pclk>, "ref";
116 			compatible = "simple-bus";
117 			#address-cells = <1>;
118 			#size-cells = <1>;
122 				compatible = "picochip,pc3x2-rtc";
123 				clock-freq = <200000000>;
125 				interrupt-parent = <&vic1>;
130 				compatible = "picochip,pc3x2-timer";
131 				interrupt-parent = <&vic0>;
133 				clock-freq = <200000000>;
138 				compatible = "picochip,pc3x2-timer";
139 				interrupt-parent = <&vic0>;
141 				clock-freq = <200000000>;
146 				compatible = "picochip,pc3x2-timer";
147 				interrupt-parent = <&vic0>;
149 				clock-freq = <200000000>;
154 				compatible = "picochip,pc3x2-timer";
155 				interrupt-parent = <&vic0>;
157 				clock-freq = <200000000>;
162 				compatible = "snps,dw-apb-gpio";
164 				#address-cells = <1>;
165 				#size-cells = <0>;
167 				banka: gpio-controller@0 {
168 					compatible = "snps,dw-apb-gpio-bank";
169 					gpio-controller;
170 					#gpio-cells = <2>;
171 					gpio-generic,nr-gpio = <8>;
173 					regoffset-dat = <0x50>;
174 					regoffset-set = <0x00>;
175 					regoffset-dirout = <0x04>;
178 				bankb: gpio-controller@1 {
179 					compatible = "snps,dw-apb-gpio-bank";
180 					gpio-controller;
181 					#gpio-cells = <2>;
182 					gpio-generic,nr-gpio = <8>;
184 					regoffset-dat = <0x54>;
185 					regoffset-set = <0x0c>;
186 					regoffset-dirout = <0x10>;
191 				compatible = "snps,dw-apb-uart";
193 				interrupt-parent = <&vic1>;
195 				clock-frequency = <3686400>;
196 				reg-shift = <2>;
197 				reg-io-width = <4>;
201 				compatible = "snps,dw-apb-uart";
203 				interrupt-parent = <&vic1>;
205 				clock-frequency = <3686400>;
206 				reg-shift = <2>;
207 				reg-io-width = <4>;
211 				compatible = "snps,dw-apb-wdg";
213 				interrupt-parent = <&vic0>;
215 				bus-clock = <&pclk>, "bus";
220 	rwid-axi {
221 		#address-cells = <1>;
222 		#size-cells = <1>;
223 		compatible = "simple-bus";
227 			compatible = "simple-bus";
228 			#address-cells = <2>;
229 			#size-cells = <1>;
237 			compatible = "picochip,axi2pico-pc3x2";
239 			interrupt-parent = <&vic0>;