Lines Matching +full:interconnect +full:- +full:names
1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/
6 #include <dt-bindings/bus/ti-sysc.h>
7 #include <dt-bindings/clock/omap4.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/pinctrl/omap.h>
11 #include <dt-bindings/clock/omap4.h>
15 interrupt-parent = <&wakeupgen>;
16 #address-cells = <1>;
17 #size-cells = <1>;
39 #address-cells = <1>;
40 #size-cells = <0>;
43 compatible = "arm,cortex-a9";
45 next-level-cache = <&L2>;
49 clock-names = "cpu";
51 clock-latency = <300000>; /* From omap-cpufreq driver */
54 compatible = "arm,cortex-a9";
56 next-level-cache = <&L2>;
68 compatible = "arm,cortex-a9-pmu";
72 gic: interrupt-controller@48241000 {
73 compatible = "arm,cortex-a9-gic";
74 interrupt-controller;
75 #interrupt-cells = <3>;
78 interrupt-parent = <&gic>;
81 L2: cache-controller@48242000 {
82 compatible = "arm,pl310-cache";
84 cache-unified;
85 cache-level = <2>;
88 local-timer@48240600 {
89 compatible = "arm,cortex-a9-twd-timer";
93 interrupt-parent = <&gic>;
96 wakeupgen: interrupt-controller@48281000 {
97 compatible = "ti,omap4-wugen-mpu";
98 interrupt-controller;
99 #interrupt-cells = <3>;
101 interrupt-parent = <&gic>;
109 compatible = "ti,omap-infra";
111 compatible = "ti,omap4-mpu";
123 * XXX: Use a flat representation of the OMAP4 interconnect.
124 * The real OMAP interconnect network is quite complex.
130 compatible = "ti,omap4-l3-noc", "simple-bus";
131 #address-cells = <1>;
132 #size-cells = <1>;
141 l4_wkup: interconnect@4a300000 {
144 l4_cfg: interconnect@4a000000 {
147 l4_per: interconnect@48000000 {
150 l4_abe: interconnect@40100000 {
154 compatible = "mmio-sram";
159 compatible = "ti,omap4430-gpmc";
161 #address-cells = <2>;
162 #size-cells = <1>;
165 dma-names = "rxtx";
166 gpmc,num-cs = <8>;
167 gpmc,num-waitpins = <4>;
169 ti,no-idle-on-init;
171 clock-names = "fck";
172 interrupt-controller;
173 #interrupt-cells = <2>;
174 gpio-controller;
175 #gpio-cells = <2>;
178 target-module@52000000 {
179 compatible = "ti,sysc-omap4", "ti,sysc";
183 reg-names = "rev", "sysc";
184 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
185 ti,sysc-midle = <SYSC_IDLE_FORCE>,
189 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
193 ti,sysc-delay-us = <2>;
195 clock-names = "fck";
196 #address-cells = <1>;
197 #size-cells = <1>;
203 target-module@55082000 {
204 compatible = "ti,sysc-omap2", "ti,sysc";
208 reg-names = "rev", "sysc", "syss";
209 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
212 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
216 clock-names = "fck";
218 reset-names = "rstctrl";
220 #size-cells = <1>;
221 #address-cells = <1>;
224 compatible = "ti,omap4-iommu";
227 #iommu-cells = <0>;
228 ti,iommu-bus-err-back;
232 target-module@4012c000 {
233 compatible = "ti,sysc-omap4", "ti,sysc";
236 reg-names = "rev", "sysc";
237 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
238 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
243 clock-names = "fck";
244 #address-cells = <1>;
245 #size-cells = <1>;
253 compatible = "ti,omap4-dmm";
260 compatible = "ti,emif-4d";
264 ti,no-idle-on-init;
265 phy-type = <1>;
266 hw-caps-read-idle-ctrl;
267 hw-caps-ll-interface;
268 hw-caps-temp-alert;
272 compatible = "ti,emif-4d";
276 ti,no-idle-on-init;
277 phy-type = <1>;
278 hw-caps-read-idle-ctrl;
279 hw-caps-ll-interface;
280 hw-caps-temp-alert;
284 compatible = "ti,omap4-dsp";
289 firmware-name = "omap4-dsp-fw.xe64T";
295 compatible = "ti,omap4-ipu";
297 reg-names = "l2ram";
301 firmware-name = "omap4-ipu-fw.xem3";
306 aes1_target: target-module@4b501000 {
307 compatible = "ti,sysc-omap2", "ti,sysc";
311 reg-names = "rev", "sysc", "syss";
312 ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
314 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
318 ti,syss-mask = <1>;
321 clock-names = "fck";
322 #address-cells = <1>;
323 #size-cells = <1>;
327 compatible = "ti,omap4-aes";
331 dma-names = "tx", "rx";
335 aes2_target: target-module@4b701000 {
336 compatible = "ti,sysc-omap2", "ti,sysc";
340 reg-names = "rev", "sysc", "syss";
341 ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
343 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
347 ti,syss-mask = <1>;
350 clock-names = "fck";
351 #address-cells = <1>;
352 #size-cells = <1>;
356 compatible = "ti,omap4-aes";
360 dma-names = "tx", "rx";
364 sham_target: target-module@4b100000 {
365 compatible = "ti,sysc-omap3-sham", "ti,sysc";
369 reg-names = "rev", "sysc", "syss";
370 ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
372 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
375 ti,syss-mask = <1>;
378 clock-names = "fck";
379 #address-cells = <1>;
380 #size-cells = <1>;
384 compatible = "ti,omap4-sham";
388 dma-names = "rx";
392 abb_mpu: regulator-abb-mpu {
393 compatible = "ti,abb-v2";
394 regulator-name = "abb_mpu";
395 #address-cells = <0>;
396 #size-cells = <0>;
397 ti,tranxdone-status-mask = <0x80>;
399 ti,settling-time = <50>;
400 ti,clock-cycles = <16>;
405 abb_iva: regulator-abb-iva {
406 compatible = "ti,abb-v2";
407 regulator-name = "abb_iva";
408 #address-cells = <0>;
409 #size-cells = <0>;
410 ti,tranxdone-status-mask = <0x80000000>;
412 ti,settling-time = <50>;
413 ti,clock-cycles = <16>;
418 sgx_module: target-module@56000000 {
419 compatible = "ti,sysc-omap4", "ti,sysc";
422 reg-names = "rev", "sysc";
423 ti,sysc-midle = <SYSC_IDLE_FORCE>,
427 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
432 clock-names = "fck";
433 #address-cells = <1>;
434 #size-cells = <1>;
447 target-module@58000000 {
448 compatible = "ti,sysc-omap2", "ti,sysc";
451 reg-names = "rev", "syss";
452 ti,syss-mask = <1>;
457 clock-names = "fck", "hdmi_clk", "sys_clk", "tv_clk";
458 #address-cells = <1>;
459 #size-cells = <1>;
463 compatible = "ti,omap4-dss";
467 clock-names = "fck";
468 #address-cells = <1>;
469 #size-cells = <1>;
472 target-module@1000 {
473 compatible = "ti,sysc-omap2", "ti,sysc";
477 reg-names = "rev", "sysc", "syss";
478 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
481 ti,sysc-midle = <SYSC_IDLE_FORCE>,
484 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
488 ti,syss-mask = <1>;
491 clock-names = "fck", "sys_clk";
492 #address-cells = <1>;
493 #size-cells = <1>;
497 compatible = "ti,omap4-dispc";
501 clock-names = "fck";
505 target-module@2000 {
506 compatible = "ti,sysc-omap2", "ti,sysc";
510 reg-names = "rev", "sysc", "syss";
511 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
514 ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
516 ti,syss-mask = <1>;
519 clock-names = "fck", "sys_clk";
520 #address-cells = <1>;
521 #size-cells = <1>;
528 clock-names = "fck", "ick";
532 target-module@3000 {
533 compatible = "ti,sysc-omap2", "ti,sysc";
535 reg-names = "rev";
537 clock-names = "sys_clk";
538 #address-cells = <1>;
539 #size-cells = <1>;
543 compatible = "ti,omap4-venc";
547 clock-names = "fck";
551 target-module@4000 {
552 compatible = "ti,sysc-omap2", "ti,sysc";
556 reg-names = "rev", "sysc", "syss";
557 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
560 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
564 ti,syss-mask = <1>;
565 #address-cells = <1>;
566 #size-cells = <1>;
570 compatible = "ti,omap4-dsi";
574 reg-names = "proto", "phy", "pll";
579 clock-names = "fck", "sys_clk";
581 #address-cells = <1>;
582 #size-cells = <0>;
586 target-module@5000 {
587 compatible = "ti,sysc-omap2", "ti,sysc";
591 reg-names = "rev", "sysc", "syss";
592 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
595 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
599 ti,syss-mask = <1>;
600 #address-cells = <1>;
601 #size-cells = <1>;
605 compatible = "ti,omap4-dsi";
609 reg-names = "proto", "phy", "pll";
614 clock-names = "fck", "sys_clk";
616 #address-cells = <1>;
617 #size-cells = <0>;
621 target-module@6000 {
622 compatible = "ti,sysc-omap4", "ti,sysc";
625 reg-names = "rev", "sysc";
630 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
632 ti,sysc-mask = <(SYSC_OMAP4_SOFTRESET)>;
635 clock-names = "fck", "dss_clk";
636 #address-cells = <1>;
637 #size-cells = <1>;
641 compatible = "ti,omap4-hdmi";
646 reg-names = "wp", "pll", "phy", "core";
651 clock-names = "fck", "sys_clk";
653 dma-names = "audio_tx";
661 #include "omap4-l4.dtsi"
662 #include "omap4-l4-abe.dtsi"
663 #include "omap44xx-clocks.dtsi"
667 compatible = "ti,omap4-prm-inst", "ti,omap-prm-inst";
669 #reset-cells = <1>;
673 compatible = "ti,omap4-prm-inst", "ti,omap-prm-inst";
675 #power-domain-cells = <0>;
679 compatible = "ti,omap4-prm-inst", "ti,omap-prm-inst";
681 #reset-cells = <1>;
685 compatible = "ti,omap4-prm-inst", "ti,omap-prm-inst";
687 #reset-cells = <1>;
691 compatible = "ti,omap4-prm-inst", "ti,omap-prm-inst";
693 #reset-cells = <1>;
697 /* Preferred always-on timer for clockevent */
699 ti,no-reset-on-init;
700 ti,no-idle;
702 assigned-clocks = <&l4_wkup_clkctrl OMAP4_TIMER1_CLKCTRL 24>;
703 assigned-clock-parents = <&sys_32k_ck>;