Lines Matching +full:0 +full:x1400
9 #clock-cells = <0>;
17 #clock-cells = <0>;
26 #clock-cells = <0>;
29 reg = <0x0d04>, <0x0d24>, <0x0d4c>, <0x0d34>;
35 #clock-cells = <0>;
39 reg = <0x0d50>;
44 #clock-cells = <0>;
48 reg = <0x0b00>;
52 #clock-cells = <0>;
60 #clock-cells = <0>;
68 #clock-cells = <0>;
76 #clock-cells = <0>;
84 #clock-cells = <0>;
92 #clock-cells = <0>;
95 reg = <0x0b40>;
99 #clock-cells = <0>;
105 #clock-cells = <0>;
108 reg = <0x0b10>;
109 ti,bit-shift = <0>;
113 #clock-cells = <0>;
116 reg = <0x0a08>;
117 ti,bit-shift = <0>;
121 #clock-cells = <0>;
124 reg = <0x0a08>;
129 #clock-cells = <0>;
132 reg = <0x0a08>;
137 #clock-cells = <0>;
140 reg = <0x0a18>;
145 #clock-cells = <0>;
148 reg = <0x0a10>;
153 #clock-cells = <0>;
156 reg = <0x0a00>;
161 #clock-cells = <0>;
164 ti,bit-shift = <0>;
165 reg = <0x0e00>;
170 #clock-cells = <0>;
173 reg = <0x0e10>;
174 ti,bit-shift = <0>;
178 #clock-cells = <0>;
181 reg = <0x1400>;
186 #clock-cells = <0>;
189 reg = <0x1400>;
190 ti,bit-shift = <0>;
194 #clock-cells = <0>;
197 reg = <0x1410>;
198 ti,bit-shift = <0>;