Lines Matching +full:1 +full:c000
13 #address-cells = <1>;
14 #size-cells = <1>;
19 #address-cells = <1>;
46 #address-cells = <1>;
47 #size-cells = <1>;
57 #address-cells = <1>;
58 #size-cells = <1>;
89 #address-cells = <1>;
90 #size-cells = <1>;
124 #address-cells = <1>;
132 #clock-cells = <1>;
158 #address-cells = <1>;
159 #size-cells = <1>;
162 <1 0xe1000000 0x01000000>,
169 #address-cells = <1>;
170 #size-cells = <1>;
184 #address-cells = <1>;
193 #address-cells = <1>;
202 ssp1: spi@2008c000 {
208 #address-cells = <1>;
217 #address-cells = <1>;
238 i2s1: i2s@2009c000 {
287 #address-cells = <1>;
298 #address-cells = <1>;
313 #address-cells = <1>;
314 #size-cells = <1>;
322 #address-cells = <1>;
323 #size-cells = <1>;
328 #clock-cells = <1>;
342 sic1: interrupt-controller@4000c000 {
360 interrupts = <1 IRQ_TYPE_LEVEL_LOW>,
378 uart7: serial@4001c000 {
400 timer4: timer@4002c000 {
418 watchdog: watchdog@4003c000 {
457 timer1: timer@4004c000 {
483 pwm1: pwm@4005c000 {