Lines Matching +full:post +full:- +full:clocks
1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2013-2017 Texas Instruments Incorporated - http://www.ti.com/
8 clocks {
10 #clock-cells = <0>;
11 compatible = "ti,keystone,pll-clock";
12 clocks = <&refclksys>;
13 clock-output-names = "arm-pll-clk";
15 reg-names = "control";
19 #clock-cells = <0>;
20 compatible = "ti,keystone,main-pll-clock";
21 clocks = <&refclksys>;
23 reg-names = "control", "multiplier", "post-divider";
27 #clock-cells = <0>;
28 compatible = "ti,keystone,pll-clock";
29 clocks = <&refclksys>;
30 clock-output-names = "papllclk";
32 reg-names = "control";
36 #clock-cells = <0>;
37 compatible = "ti,keystone,pll-clock";
38 clocks = <&refclksys>;
39 clock-output-names = "ddr-3a-pll-clk";
41 reg-names = "control";
45 #clock-cells = <0>;
46 compatible = "ti,keystone,psc-clock";
47 clocks = <&chipclk12>;
48 clock-output-names = "dfe";
49 reg-names = "control", "domain";
51 domain-id = <0>;
55 #clock-cells = <0>;
56 compatible = "ti,keystone,psc-clock";
57 clocks = <&chipclk12>;
58 clock-output-names = "pcie";
60 reg-names = "control", "domain";
61 domain-id = <4>;
65 #clock-cells = <0>;
66 compatible = "ti,keystone,psc-clock";
67 clocks = <&chipclk1>;
68 clock-output-names = "gem1";
70 reg-names = "control", "domain";
71 domain-id = <9>;
75 #clock-cells = <0>;
76 compatible = "ti,keystone,psc-clock";
77 clocks = <&chipclk1>;
78 clock-output-names = "gem2";
80 reg-names = "control", "domain";
81 domain-id = <10>;
85 #clock-cells = <0>;
86 compatible = "ti,keystone,psc-clock";
87 clocks = <&chipclk1>;
88 clock-output-names = "gem3";
90 reg-names = "control", "domain";
91 domain-id = <11>;
95 #clock-cells = <0>;
96 compatible = "ti,keystone,psc-clock";
97 clocks = <&chipclk13>;
98 clock-output-names = "tac";
100 reg-names = "control", "domain";
101 domain-id = <17>;
105 #clock-cells = <0>;
106 compatible = "ti,keystone,psc-clock";
107 clocks = <&chipclk13>;
108 clock-output-names = "rac";
110 reg-names = "control", "domain";
111 domain-id = <17>;
115 #clock-cells = <0>;
116 compatible = "ti,keystone,psc-clock";
117 clocks = <&chipclk13>;
118 clock-output-names = "dfe-pd0";
120 reg-names = "control", "domain";
121 domain-id = <18>;
125 #clock-cells = <0>;
126 compatible = "ti,keystone,psc-clock";
127 clocks = <&chipclk13>;
128 clock-output-names = "fftc-0";
130 reg-names = "control", "domain";
131 domain-id = <19>;
135 #clock-cells = <0>;
136 compatible = "ti,keystone,psc-clock";
137 clocks = <&chipclk13>;
138 clock-output-names = "osr";
140 reg-names = "control", "domain";
141 domain-id = <21>;
145 #clock-cells = <0>;
146 compatible = "ti,keystone,psc-clock";
147 clocks = <&chipclk13>;
148 clock-output-names = "tcp3d-0";
150 reg-names = "control", "domain";
151 domain-id = <22>;
155 #clock-cells = <0>;
156 compatible = "ti,keystone,psc-clock";
157 clocks = <&chipclk13>;
158 clock-output-names = "tcp3d-1";
160 reg-names = "control", "domain";
161 domain-id = <23>;
165 #clock-cells = <0>;
166 compatible = "ti,keystone,psc-clock";
167 clocks = <&chipclk13>;
168 clock-output-names = "vcp-0";
170 reg-names = "control", "domain";
171 domain-id = <24>;
175 #clock-cells = <0>;
176 compatible = "ti,keystone,psc-clock";
177 clocks = <&chipclk13>;
178 clock-output-names = "vcp-1";
180 reg-names = "control", "domain";
181 domain-id = <24>;
185 #clock-cells = <0>;
186 compatible = "ti,keystone,psc-clock";
187 clocks = <&chipclk13>;
188 clock-output-names = "vcp-2";
190 reg-names = "control", "domain";
191 domain-id = <24>;
195 #clock-cells = <0>;
196 compatible = "ti,keystone,psc-clock";
197 clocks = <&chipclk13>;
198 clock-output-names = "vcp-3";
200 reg-names = "control", "domain";
201 domain-id = <24>;
205 #clock-cells = <0>;
206 compatible = "ti,keystone,psc-clock";
207 clocks = <&chipclk13>;
208 clock-output-names = "bcp";
210 reg-names = "control", "domain";
211 domain-id = <26>;
215 #clock-cells = <0>;
216 compatible = "ti,keystone,psc-clock";
217 clocks = <&chipclk13>;
218 clock-output-names = "dfe-pd1";
220 reg-names = "control", "domain";
221 domain-id = <27>;
225 #clock-cells = <0>;
226 compatible = "ti,keystone,psc-clock";
227 clocks = <&chipclk13>;
228 clock-output-names = "fftc-1";
230 reg-names = "control", "domain";
231 domain-id = <28>;
235 #clock-cells = <0>;
236 compatible = "ti,keystone,psc-clock";
237 clocks = <&chipclk13>;
238 clock-output-names = "iqn-ail";
240 reg-names = "control", "domain";
241 domain-id = <29>;
245 #clock-cells = <0>;
246 compatible = "ti,keystone,psc-clock";
247 clocks = <&clkmodrst0>;
248 clock-output-names = "uart2";
250 reg-names = "control", "domain";
251 domain-id = <0>;
255 #clock-cells = <0>;
256 compatible = "ti,keystone,psc-clock";
257 clocks = <&clkmodrst0>;
258 clock-output-names = "uart3";
260 reg-names = "control", "domain";
261 domain-id = <0>;