boot/dts/integratorap.dts

17 		#size-cells = <0>;
19 		cpu@0 {
28 			reg = <0>;
37 			operating-points = <71000  0
38 					    66000  0
39 					    60000  0
40 					    48000  0
41 					    36000  0
42 					    24000  0
43 					    12000  0>;
61 		#clock-cells = <0>;
66 	pclk: pclk@0 {
67 		#clock-cells = <0>;
76 		#clock-cells = <0>;
85 			#clock-cells = <0>;
93 			#clock-cells = <0>;
94 			lock-offset = <0x14>;
95 			vco-offset = <0x08>;
102 			#clock-cells = <0>;
103 			lock-offset = <0x14>;
104 			vco-offset = <0x1c>;
111 		reg = <0x11000000 0x100>;
119 			#clock-cells = <0>;
120 			lock-offset = <0x1c>;
121 			vco-offset = <0x04>;
128 			#clock-cells = <0>;
129 			lock-offset = <0x1c>;
130 			vco-offset = <0x04>;
151 		valid-mask = <0x003fffff>;
161 		reg = <0x62000000 0x10000>, <0x61000000 0x01000000>;
165 		bus-range = <0x00 0xff>;
166 		ranges = <0x01000000 0 0x0000000 /* I/O space @00000000 */
167 			0x60000000 0 0x00010000 /* 64 KB @ LB 60000000 */
168 			0x02000000 0 0x40000000 /* non-prefectable memory @40000000 */
169 			0x40000000 0 0x10000000 /* 256 MiB @ LB 40000000 1:1 */
170 			0x42000000 0 0x50000000 /* prefetchable memory @50000000 */
171 			0x50000000 0 0x10000000>; /* 256 MiB @ LB 50000000 1:1 */
172 		dma-ranges = <0x02000000 0 0x20000000 /* EBI memory space */
173 			0x20000000 0 0x20000000 /* 512 MB @ LB 20000000 1:1 */
174 			0x02000000 0 0x80000000 /* Core module alias memory */
175 			0x80000000 0 0x40000000>; /* 1GB @ LB 80000000 */
176 		interrupt-map-mask = <0xf800 0 0 0x7>;
179 		0x4800 0 0 1 &pic 13 /* INT A on slot 9 is irq 13 */
180 		0x4800 0 0 2 &pic 14 /* INT B on slot 9 is irq 14 */
181 		0x4800 0 0 3 &pic 15 /* INT C on slot 9 is irq 15 */
182 		0x4800 0 0 4 &pic 16 /* INT D on slot 9 is irq 16 */
184 		0x5000 0 0 1 &pic 14 /* INT A on slot 10 is irq 14 */
185 		0x5000 0 0 2 &pic 15 /* INT B on slot 10 is irq 15 */
186 		0x5000 0 0 3 &pic 16 /* INT C on slot 10 is irq 16 */
187 		0x5000 0 0 4 &pic 13 /* INT D on slot 10 is irq 13 */
189 		0x5800 0 0 1 &pic 15 /* INT A on slot 11 is irq 15 */
190 		0x5800 0 0 2 &pic 16 /* INT B on slot 11 is irq 16 */
191 		0x5800 0 0 3 &pic 13 /* INT C on slot 11 is irq 13 */
192 		0x5800 0 0 4 &pic 14 /* INT D on slot 11 is irq 14 */
194 		0x6000 0 0 1 &pic 16 /* INT A on slot 12 is irq 16 */
195 		0x6000 0 0 2 &pic 13 /* INT B on slot 12 is irq 13 */
196 		0x6000 0 0 3 &pic 14 /* INT C on slot 12 is irq 14 */
197 		0x6000 0 0 4 &pic 15 /* INT D on slot 12 is irq 15 */
209 			arm,primecell-periphid = <0x00041030>;
216 			arm,primecell-periphid = <0x00041010>;
223 			arm,primecell-periphid = <0x00041010>;
230 			arm,primecell-periphid = <0x00041050>;
237 			arm,primecell-periphid = <0x00041050>;
245 	 * They appear at 0xc0000000, 0xd0000000, 0xe0000000 and 0xf0000000
252 		ranges = <0xc0000000 0xc0000000 0x40000000>;
257 			ranges = <0x00000000 0xc0000000 0x10000000>;
258 			dma-ranges = <0x00000000 0x80000000 0x10000000>;
259 			reg = <0xc0000000 0x10000000>;
265 			ranges = <0x00000000 0xd0000000 0x10000000>;
266 			dma-ranges = <0x00000000 0x80000000 0x10000000>;
267 			reg = <0xd0000000 0x10000000>;
273 			ranges = <0x00000000 0xe0000000 0x10000000>;
274 			dma-ranges = <0x00000000 0x80000000 0x10000000>;
275 			reg = <0xe0000000 0x10000000>;
281 			ranges = <0x00000000 0xf0000000 0x10000000>;
282 			dma-ranges = <0x00000000 0x80000000 0x10000000>;
283 			reg = <0xf0000000 0x10000000>;