Lines Matching +full:0 +full:x00000bff
21 reg = <0xc2000000 0x00100000>;
28 syscon@0 {
30 reg = <0x00000000 0x1000>;
34 #clock-cells = <0>;
35 lock-offset = <0x08>;
36 vco-offset = <0x00>;
43 #clock-cells = <0>;
44 lock-offset = <0x08>;
45 vco-offset = <0x04>;
54 #clock-cells = <0>;
64 #clock-cells = <0>;
84 #size-cells = <0>;
86 button@0 {
90 gpios = <&impd1_gpio1 0 GPIO_ACTIVE_HIGH>;
128 #size-cells = <0>;
132 #size-cells = <0>;
133 port@0 {
134 reg = <0>;
162 reg = <0x00100000 0x1000>;
170 reg = <0x00200000 0x1000>;
178 reg = <0x00300000 0x1000>;
186 reg = <0x00400000 0x1000>;
198 reg = <0x00500000 0x1000>;
210 reg = <0x00600000 0x1000>;
218 reg = <0x00700000 0x1000>;
232 reg = <0x00800000 0x1000>;
240 reg = <0x01000000 0x1000>;
248 port@0 {
250 #size-cells = <0>;
252 clcd_pads_vga_dac: endpoint@0 {
253 reg = <0>;
255 arm,pl11x,tft-r0g0b0-pads = <0 8 16>;
264 reg = <0x03000000 0x1000>;
265 /* Valid interrupts, 0-9 and 11 */
266 valid-mask = <0x00000bff>;
267 /* LM site 0 has IRQ 9 on the PIC */