Lines Matching +full:imx7d +full:- +full:clock
1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
6 #include <dt-bindings/clock/imx7d-clock.h>
7 #include <dt-bindings/power/imx7-power.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/reset/imx7-reset.h>
12 #include "imx7d-pinfunc.h"
15 #address-cells = <1>;
16 #size-cells = <1>;
19 * pre-existing /chosen node to be available to insert the
53 #address-cells = <1>;
54 #size-cells = <0>;
56 idle-states {
57 entry-method = "psci";
59 cpu_sleep_wait: cpu-sleep-wait {
60 compatible = "arm,idle-state";
61 arm,psci-suspend-param = <0x0010000>;
62 local-timer-stop;
63 entry-latency-us = <100>;
64 exit-latency-us = <50>;
65 min-residency-us = <1000>;
70 compatible = "arm,cortex-a7";
73 clock-frequency = <792000000>;
74 clock-latency = <61036>; /* two CLK32 periods */
76 cpu-idle-states = <&cpu_sleep_wait>;
80 ckil: clock-cki {
81 compatible = "fixed-clock";
82 #clock-cells = <0>;
83 clock-frequency = <32768>;
84 clock-output-names = "ckil";
87 osc: clock-osc {
88 compatible = "fixed-clock";
89 #clock-cells = <0>;
90 clock-frequency = <24000000>;
91 clock-output-names = "osc";
95 compatible = "usb-nop-xceiv";
97 clock-names = "main_clk";
98 #phy-cells = <0>;
102 compatible = "usb-nop-xceiv";
104 clock-names = "main_clk";
105 power-domains = <&pgc_hsic_phy>;
106 #phy-cells = <0>;
110 compatible = "arm,cortex-a7-pmu";
111 interrupt-parent = <&gpc>;
113 interrupt-affinity = <&cpu0>;
118 * non-configurable replicators don't show up on the
121 compatible = "arm,coresight-static-replicator";
123 out-ports {
124 #address-cells = <1>;
125 #size-cells = <0>;
130 remote-endpoint = <&tpiu_in_port>;
137 remote-endpoint = <&etr_in_port>;
142 in-ports {
145 remote-endpoint = <&etf_out_port>;
152 compatible = "arm,armv7-timer";
153 interrupt-parent = <&intc>;
161 #address-cells = <1>;
162 #size-cells = <1>;
163 compatible = "simple-bus";
164 interrupt-parent = <&gpc>;
168 compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
171 clock-names = "apb_pclk";
173 ca_funnel_in_ports: in-ports {
176 remote-endpoint = <&etm0_out_port>;
183 out-ports {
186 remote-endpoint = <&hugo_funnel_in_port0>;
194 compatible = "arm,coresight-etm3x", "arm,primecell";
198 clock-names = "apb_pclk";
200 out-ports {
203 remote-endpoint = <&ca_funnel_in_port0>;
210 compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
213 clock-names = "apb_pclk";
215 in-ports {
216 #address-cells = <1>;
217 #size-cells = <0>;
222 remote-endpoint = <&ca_funnel_out_port0>;
235 out-ports {
238 remote-endpoint = <&etf_in_port>;
245 compatible = "arm,coresight-tmc", "arm,primecell";
248 clock-names = "apb_pclk";
250 in-ports {
253 remote-endpoint = <&hugo_funnel_out_port0>;
258 out-ports {
261 remote-endpoint = <&replicator_in_port0>;
268 compatible = "arm,coresight-tmc", "arm,primecell";
271 clock-names = "apb_pclk";
273 in-ports {
276 remote-endpoint = <&replicator_out_port1>;
283 compatible = "arm,coresight-tpiu", "arm,primecell";
286 clock-names = "apb_pclk";
288 in-ports {
291 remote-endpoint = <&replicator_out_port0>;
297 intc: interrupt-controller@31001000 {
298 compatible = "arm,cortex-a7-gic";
300 #interrupt-cells = <3>;
301 interrupt-controller;
302 interrupt-parent = <&intc>;
310 compatible = "fsl,aips-bus", "simple-bus";
311 #address-cells = <1>;
312 #size-cells = <1>;
317 compatible = "fsl,imx7d-gpio", "fsl,imx35-gpio";
321 gpio-controller;
322 #gpio-cells = <2>;
323 interrupt-controller;
324 #interrupt-cells = <2>;
325 gpio-ranges = <&iomuxc_lpsr 0 0 8>, <&iomuxc 8 5 8>;
329 compatible = "fsl,imx7d-gpio", "fsl,imx35-gpio";
333 gpio-controller;
334 #gpio-cells = <2>;
335 interrupt-controller;
336 #interrupt-cells = <2>;
337 gpio-ranges = <&iomuxc 0 13 32>;
341 compatible = "fsl,imx7d-gpio", "fsl,imx35-gpio";
345 gpio-controller;
346 #gpio-cells = <2>;
347 interrupt-controller;
348 #interrupt-cells = <2>;
349 gpio-ranges = <&iomuxc 0 45 29>;
353 compatible = "fsl,imx7d-gpio", "fsl,imx35-gpio";
357 gpio-controller;
358 #gpio-cells = <2>;
359 interrupt-controller;
360 #interrupt-cells = <2>;
361 gpio-ranges = <&iomuxc 0 74 24>;
365 compatible = "fsl,imx7d-gpio", "fsl,imx35-gpio";
369 gpio-controller;
370 #gpio-cells = <2>;
371 interrupt-controller;
372 #interrupt-cells = <2>;
373 gpio-ranges = <&iomuxc 0 98 18>;
377 compatible = "fsl,imx7d-gpio", "fsl,imx35-gpio";
381 gpio-controller;
382 #gpio-cells = <2>;
383 interrupt-controller;
384 #interrupt-cells = <2>;
385 gpio-ranges = <&iomuxc 0 116 23>;
389 compatible = "fsl,imx7d-gpio", "fsl,imx35-gpio";
393 gpio-controller;
394 #gpio-cells = <2>;
395 interrupt-controller;
396 #interrupt-cells = <2>;
397 gpio-ranges = <&iomuxc 0 139 16>;
401 compatible = "fsl,imx7d-wdt", "fsl,imx21-wdt";
408 compatible = "fsl,imx7d-wdt", "fsl,imx21-wdt";
416 compatible = "fsl,imx7d-wdt", "fsl,imx21-wdt";
424 compatible = "fsl,imx7d-wdt", "fsl,imx21-wdt";
431 iomuxc_lpsr: iomuxc-lpsr@302c0000 {
432 compatible = "fsl,imx7d-iomuxc-lpsr";
434 fsl,input-sel = <&iomuxc>;
438 compatible = "fsl,imx7d-gpt", "fsl,imx6sx-gpt";
443 clock-names = "ipg", "per";
447 compatible = "fsl,imx7d-gpt", "fsl,imx6sx-gpt";
452 clock-names = "ipg", "per";
457 compatible = "fsl,imx7d-gpt", "fsl,imx6sx-gpt";
462 clock-names = "ipg", "per";
467 compatible = "fsl,imx7d-gpt", "fsl,imx6sx-gpt";
472 clock-names = "ipg", "per";
477 compatible = "fsl,imx7d-kpp", "fsl,imx21-kpp";
485 compatible = "fsl,imx7d-iomuxc";
489 gpr: iomuxc-gpr@30340000 {
490 compatible = "fsl,imx7d-iomuxc-gpr",
491 "fsl,imx6q-iomuxc-gpr", "syscon",
492 "simple-mfd";
495 mux: mux-controller {
496 compatible = "mmio-mux";
497 #mux-control-cells = <0>;
498 mux-reg-masks = <0x14 0x00000010>;
501 video_mux: csi-mux {
502 compatible = "video-mux";
503 mux-controls = <&mux 0>;
504 #address-cells = <1>;
505 #size-cells = <0>;
516 remote-endpoint = <&mipi_vc0_to_csi_mux>;
524 remote-endpoint = <&csi_from_csi_mux>;
531 #address-cells = <1>;
532 #size-cells = <1>;
533 compatible = "fsl,imx7d-ocotp", "syscon";
541 fuse_grade: fuse-grade@10 {
547 compatible = "fsl,imx7d-anatop", "fsl,imx6q-anatop",
548 "syscon", "simple-mfd";
553 reg_1p0d: regulator-vdd1p0d {
554 compatible = "fsl,anatop-regulator";
555 regulator-name = "vdd1p0d";
556 regulator-min-microvolt = <800000>;
557 regulator-max-microvolt = <1200000>;
558 anatop-reg-offset = <0x210>;
559 anatop-vol-bit-shift = <8>;
560 anatop-vol-bit-width = <5>;
561 anatop-min-bit-val = <8>;
562 anatop-min-voltage = <800000>;
563 anatop-max-voltage = <1200000>;
564 anatop-enable-bit = <0>;
567 reg_1p2: regulator-vdd1p2 {
568 compatible = "fsl,anatop-regulator";
569 regulator-name = "vdd1p2";
570 regulator-min-microvolt = <1100000>;
571 regulator-max-microvolt = <1300000>;
572 anatop-reg-offset = <0x220>;
573 anatop-vol-bit-shift = <8>;
574 anatop-vol-bit-width = <5>;
575 anatop-min-bit-val = <0x14>;
576 anatop-min-voltage = <1100000>;
577 anatop-max-voltage = <1300000>;
578 anatop-enable-bit = <0>;
582 compatible = "fsl,imx7d-tempmon";
583 interrupt-parent = <&gpc>;
586 nvmem-cells = <&tempmon_calib>, <&fuse_grade>;
587 nvmem-cell-names = "calib", "temp_grade";
593 compatible = "fsl,sec-v4.0-mon", "syscon", "simple-mfd";
596 snvs_rtc: snvs-rtc-lp {
597 compatible = "fsl,sec-v4.0-mon-rtc-lp";
603 clock-names = "snvs-rtc";
606 snvs_pwrkey: snvs-powerkey {
607 compatible = "fsl,sec-v4.0-pwrkey";
611 clock-names = "snvs-pwrkey";
613 wakeup-source;
618 clks: clock-controller@30380000 {
619 compatible = "fsl,imx7d-ccm";
623 #clock-cells = <1>;
625 clock-names = "ckil", "osc";
628 src: reset-controller@30390000 {
629 compatible = "fsl,imx7d-src", "syscon";
632 #reset-cells = <1>;
636 compatible = "fsl,imx7d-gpc";
638 interrupt-controller;
640 #interrupt-cells = <3>;
641 interrupt-parent = <&intc>;
642 #power-domain-cells = <1>;
645 #address-cells = <1>;
646 #size-cells = <0>;
648 pgc_mipi_phy: power-domain@0 {
649 #power-domain-cells = <0>;
651 power-supply = <®_1p0d>;
654 pgc_pcie_phy: power-domain@1 {
655 #power-domain-cells = <0>;
657 power-supply = <®_1p0d>;
660 pgc_hsic_phy: power-domain@2 {
661 #power-domain-cells = <0>;
663 power-supply = <®_1p2>;
670 compatible = "fsl,aips-bus", "simple-bus";
671 #address-cells = <1>;
672 #size-cells = <1>;
677 compatible = "fsl,imx7d-adc";
681 clock-names = "adc";
682 #io-channel-cells = <1>;
687 compatible = "fsl,imx7d-adc";
691 clock-names = "adc";
692 #io-channel-cells = <1>;
697 #address-cells = <1>;
698 #size-cells = <0>;
699 compatible = "fsl,imx7d-ecspi", "fsl,imx51-ecspi";
704 clock-names = "ipg", "per";
709 compatible = "fsl,imx7d-pwm", "fsl,imx27-pwm";
714 clock-names = "ipg", "per";
715 #pwm-cells = <3>;
720 compatible = "fsl,imx7d-pwm", "fsl,imx27-pwm";
725 clock-names = "ipg", "per";
726 #pwm-cells = <3>;
731 compatible = "fsl,imx7d-pwm", "fsl,imx27-pwm";
736 clock-names = "ipg", "per";
737 #pwm-cells = <3>;
742 compatible = "fsl,imx7d-pwm", "fsl,imx27-pwm";
747 clock-names = "ipg", "per";
748 #pwm-cells = <3>;
753 compatible = "fsl,imx7-csi";
759 clock-names = "axi", "mclk", "dcic";
764 remote-endpoint = <&csi_mux_to_csi>;
770 compatible = "fsl,imx7d-lcdif", "fsl,imx28-lcdif";
775 clock-names = "pix", "axi";
779 mipi_csi: mipi-csi@30750000 {
780 compatible = "fsl,imx7-mipi-csi2";
782 #address-cells = <1>;
783 #size-cells = <0>;
788 clock-names = "pclk", "wrap", "phy";
789 power-domains = <&pgc_mipi_phy>;
790 phy-supply = <®_1p0d>;
792 reset-names = "mrst";
803 remote-endpoint = <&csi_mux_from_mipi_vc0>;
810 compatible = "fsl,aips-bus", "simple-bus";
811 #address-cells = <1>;
812 #size-cells = <1>;
816 spba-bus@30800000 {
817 compatible = "fsl,spba-bus", "simple-bus";
818 #address-cells = <1>;
819 #size-cells = <1>;
824 #address-cells = <1>;
825 #size-cells = <0>;
826 compatible = "fsl,imx7d-ecspi", "fsl,imx51-ecspi";
831 clock-names = "ipg", "per";
836 #address-cells = <1>;
837 #size-cells = <0>;
838 compatible = "fsl,imx7d-ecspi", "fsl,imx51-ecspi";
843 clock-names = "ipg", "per";
848 #address-cells = <1>;
849 #size-cells = <0>;
850 compatible = "fsl,imx7d-ecspi", "fsl,imx51-ecspi";
855 clock-names = "ipg", "per";
860 compatible = "fsl,imx7d-uart",
861 "fsl,imx6q-uart";
866 clock-names = "ipg", "per";
871 compatible = "fsl,imx7d-uart",
872 "fsl,imx6q-uart";
877 clock-names = "ipg", "per";
882 compatible = "fsl,imx7d-uart",
883 "fsl,imx6q-uart";
888 clock-names = "ipg", "per";
893 #sound-dai-cells = <0>;
894 compatible = "fsl,imx7d-sai", "fsl,imx6sx-sai";
901 clock-names = "bus", "mclk1", "mclk2", "mclk3";
902 dma-names = "rx", "tx";
908 #sound-dai-cells = <0>;
909 compatible = "fsl,imx7d-sai", "fsl,imx6sx-sai";
916 clock-names = "bus", "mclk1", "mclk2", "mclk3";
917 dma-names = "rx", "tx";
923 #sound-dai-cells = <0>;
924 compatible = "fsl,imx7d-sai", "fsl,imx6sx-sai";
931 clock-names = "bus", "mclk1", "mclk2", "mclk3";
932 dma-names = "rx", "tx";
939 compatible = "fsl,sec-v4.0";
940 #address-cells = <1>;
941 #size-cells = <1>;
947 clock-names = "ipg", "aclk";
950 compatible = "fsl,sec-v4.0-job-ring";
956 compatible = "fsl,sec-v4.0-job-ring";
962 compatible = "fsl,sec-v4.0-job-ring";
969 compatible = "fsl,imx7d-flexcan", "fsl,imx6q-flexcan";
974 clock-names = "ipg", "per";
975 fsl,stop-mode = <&gpr 0x10 1 0x10 17>;
980 compatible = "fsl,imx7d-flexcan", "fsl,imx6q-flexcan";
985 clock-names = "ipg", "per";
986 fsl,stop-mode = <&gpr 0x10 2 0x10 18>;
991 #address-cells = <1>;
992 #size-cells = <0>;
993 compatible = "fsl,imx7d-i2c", "fsl,imx21-i2c";
1001 #address-cells = <1>;
1002 #size-cells = <0>;
1003 compatible = "fsl,imx7d-i2c", "fsl,imx21-i2c";
1011 #address-cells = <1>;
1012 #size-cells = <0>;
1013 compatible = "fsl,imx7d-i2c", "fsl,imx21-i2c";
1021 #address-cells = <1>;
1022 #size-cells = <0>;
1023 compatible = "fsl,imx7d-i2c", "fsl,imx21-i2c";
1031 compatible = "fsl,imx7d-uart",
1032 "fsl,imx6q-uart";
1037 clock-names = "ipg", "per";
1042 compatible = "fsl,imx7d-uart",
1043 "fsl,imx6q-uart";
1048 clock-names = "ipg", "per";
1053 compatible = "fsl,imx7d-uart",
1054 "fsl,imx6q-uart";
1059 clock-names = "ipg", "per";
1064 compatible = "fsl,imx7d-uart",
1065 "fsl,imx6q-uart";
1070 clock-names = "ipg", "per";
1075 compatible = "fsl,imx7s-mu", "fsl,imx6sx-mu";
1079 #mbox-cells = <2>;
1084 compatible = "fsl,imx7s-mu", "fsl,imx6sx-mu";
1088 #mbox-cells = <2>;
1089 fsl,mu-side-b;
1094 compatible = "fsl,imx7d-usb", "fsl,imx27-usb";
1100 phy-clkgate-delay-us = <400>;
1105 compatible = "fsl,imx7d-usb", "fsl,imx27-usb";
1113 phy-clkgate-delay-us = <400>;
1118 #index-cells = <1>;
1119 compatible = "fsl,imx7d-usbmisc", "fsl,imx6q-usbmisc";
1124 #index-cells = <1>;
1125 compatible = "fsl,imx7d-usbmisc", "fsl,imx6q-usbmisc";
1130 compatible = "fsl,imx7d-usdhc", "fsl,imx6sl-usdhc";
1136 clock-names = "ipg", "ahb", "per";
1137 bus-width = <4>;
1142 compatible = "fsl,imx7d-usdhc", "fsl,imx6sl-usdhc";
1148 clock-names = "ipg", "ahb", "per";
1149 bus-width = <4>;
1154 compatible = "fsl,imx7d-usdhc", "fsl,imx6sl-usdhc";
1160 clock-names = "ipg", "ahb", "per";
1161 bus-width = <4>;
1166 compatible = "fsl,imx7d-qspi";
1168 reg-names = "QuadSPI", "QuadSPI-memory";
1169 #address-cells = <1>;
1170 #size-cells = <0>;
1174 clock-names = "qspi_en", "qspi";
1179 compatible = "fsl,imx7d-sdma", "fsl,imx35-sdma";
1184 clock-names = "ipg", "ahb";
1185 #dma-cells = <3>;
1186 fsl,sdma-ram-script-name = "imx/sdma/sdma-imx7d.bin";
1190 compatible = "fsl,imx7d-fec", "fsl,imx6sx-fec";
1192 interrupt-names = "int0", "int1", "int2", "pps";
1202 clock-names = "ipg", "ahb", "ptp",
1204 fsl,num-tx-queues = <3>;
1205 fsl,num-rx-queues = <3>;
1206 fsl,stop-mode = <&gpr 0x10 3>;
1211 dma_apbh: dma-apbh@33000000 {
1212 compatible = "fsl,imx7d-dma-apbh", "fsl,imx28-dma-apbh";
1218 interrupt-names = "gpmi0", "gpmi1", "gpmi2", "gpmi3";
1219 #dma-cells = <1>;
1220 dma-channels = <4>;
1224 gpmi: nand-controller@33002000{
1225 compatible = "fsl,imx7d-gpmi-nand";
1226 #address-cells = <1>;
1227 #size-cells = <1>;
1229 reg-names = "gpmi-nand", "bch";
1231 interrupt-names = "bch";
1234 clock-names = "gpmi_io", "gpmi_bch_apb";
1236 dma-names = "rx-tx";
1238 assigned-clocks = <&clks IMX7D_NAND_ROOT_SRC>;
1239 assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_500M_CLK>;