Lines Matching +full:imx51 +full:- +full:i2c
1 // SPDX-License-Identifier: GPL-2.0
5 #include <dt-bindings/clock/imx6ul-clock.h>
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/input/input.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include "imx6ul-pinfunc.h"
12 #address-cells = <1>;
13 #size-cells = <1>;
16 * pre-existing /chosen node to be available to insert the
55 #address-cells = <1>;
56 #size-cells = <0>;
59 compatible = "arm,cortex-a7";
62 clock-frequency = <696000000>;
63 clock-latency = <61036>; /* two CLK32 periods */
64 #cooling-cells = <2>;
65 operating-points =
71 fsl,soc-operating-points =
84 clock-names = "arm", "pll2_bus", "pll2_pfd2_396m",
87 arm-supply = <®_arm>;
88 soc-supply = <®_soc>;
89 nvmem-cells = <&cpu_speed_grade>;
90 nvmem-cell-names = "speed_grade";
95 compatible = "arm,armv7-timer";
100 interrupt-parent = <&intc>;
104 ckil: clock-cli {
105 compatible = "fixed-clock";
106 #clock-cells = <0>;
107 clock-frequency = <32768>;
108 clock-output-names = "ckil";
111 osc: clock-osc {
112 compatible = "fixed-clock";
113 #clock-cells = <0>;
114 clock-frequency = <24000000>;
115 clock-output-names = "osc";
118 ipp_di0: clock-di0 {
119 compatible = "fixed-clock";
120 #clock-cells = <0>;
121 clock-frequency = <0>;
122 clock-output-names = "ipp_di0";
125 ipp_di1: clock-di1 {
126 compatible = "fixed-clock";
127 #clock-cells = <0>;
128 clock-frequency = <0>;
129 clock-output-names = "ipp_di1";
133 compatible = "arm,cortex-a7-pmu";
134 interrupt-parent = <&gpc>;
139 #address-cells = <1>;
140 #size-cells = <1>;
141 compatible = "simple-bus";
142 interrupt-parent = <&gpc>;
146 compatible = "mmio-sram";
149 #address-cells = <1>;
150 #size-cells = <1>;
153 intc: interrupt-controller@a01000 {
154 compatible = "arm,gic-400", "arm,cortex-a7-gic";
156 #interrupt-cells = <3>;
157 interrupt-controller;
158 interrupt-parent = <&intc>;
165 dma_apbh: dma-apbh@1804000 {
166 compatible = "fsl,imx6q-dma-apbh", "fsl,imx28-dma-apbh";
172 interrupt-names = "gpmi0", "gpmi1", "gpmi2", "gpmi3";
173 #dma-cells = <1>;
174 dma-channels = <4>;
178 gpmi: nand-controller@1806000 {
179 compatible = "fsl,imx6q-gpmi-nand";
180 #address-cells = <1>;
181 #size-cells = <1>;
183 reg-names = "gpmi-nand", "bch";
185 interrupt-names = "bch";
191 clock-names = "gpmi_io", "gpmi_apb", "gpmi_bch",
194 dma-names = "rx-tx";
199 compatible = "fsl,aips-bus", "simple-bus";
200 #address-cells = <1>;
201 #size-cells = <1>;
205 spba-bus@2000000 {
206 compatible = "fsl,spba-bus", "simple-bus";
207 #address-cells = <1>;
208 #size-cells = <1>;
213 #address-cells = <1>;
214 #size-cells = <0>;
215 compatible = "fsl,imx6ul-ecspi", "fsl,imx51-ecspi";
220 clock-names = "ipg", "per";
222 dma-names = "rx", "tx";
227 #address-cells = <1>;
228 #size-cells = <0>;
229 compatible = "fsl,imx6ul-ecspi", "fsl,imx51-ecspi";
234 clock-names = "ipg", "per";
236 dma-names = "rx", "tx";
241 #address-cells = <1>;
242 #size-cells = <0>;
243 compatible = "fsl,imx6ul-ecspi", "fsl,imx51-ecspi";
248 clock-names = "ipg", "per";
250 dma-names = "rx", "tx";
255 #address-cells = <1>;
256 #size-cells = <0>;
257 compatible = "fsl,imx6ul-ecspi", "fsl,imx51-ecspi";
262 clock-names = "ipg", "per";
264 dma-names = "rx", "tx";
269 compatible = "fsl,imx6ul-uart",
270 "fsl,imx6q-uart";
275 clock-names = "ipg", "per";
280 compatible = "fsl,imx6ul-uart",
281 "fsl,imx6q-uart";
286 clock-names = "ipg", "per";
291 compatible = "fsl,imx6ul-uart",
292 "fsl,imx6q-uart";
297 clock-names = "ipg", "per";
302 #sound-dai-cells = <0>;
303 compatible = "fsl,imx6ul-sai", "fsl,imx6sx-sai";
309 clock-names = "bus", "mclk1", "mclk2", "mclk3";
312 dma-names = "rx", "tx";
317 #sound-dai-cells = <0>;
318 compatible = "fsl,imx6ul-sai", "fsl,imx6sx-sai";
324 clock-names = "bus", "mclk1", "mclk2", "mclk3";
327 dma-names = "rx", "tx";
332 #sound-dai-cells = <0>;
333 compatible = "fsl,imx6ul-sai", "fsl,imx6sx-sai";
339 clock-names = "bus", "mclk1", "mclk2", "mclk3";
342 dma-names = "rx", "tx";
347 compatible = "fsl,imx6ul-asrc", "fsl,imx53-asrc";
357 clock-names = "mem", "ipg", "asrck_0",
364 dma-names = "rxa", "rxb", "rxc",
366 fsl,asrc-rate = <48000>;
367 fsl,asrc-width = <16>;
373 compatible = "fsl,imx6ul-tsc";
379 clock-names = "tsc", "adc";
384 compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm";
389 clock-names = "ipg", "per";
390 #pwm-cells = <3>;
395 compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm";
400 clock-names = "ipg", "per";
401 #pwm-cells = <3>;
406 compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm";
411 clock-names = "ipg", "per";
412 #pwm-cells = <3>;
417 compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm";
422 clock-names = "ipg", "per";
423 #pwm-cells = <3>;
428 compatible = "fsl,imx6ul-flexcan", "fsl,imx6q-flexcan";
433 clock-names = "ipg", "per";
434 fsl,stop-mode = <&gpr 0x10 1 0x10 17>;
439 compatible = "fsl,imx6ul-flexcan", "fsl,imx6q-flexcan";
444 clock-names = "ipg", "per";
445 fsl,stop-mode = <&gpr 0x10 2 0x10 18>;
450 compatible = "fsl,imx6ul-gpt", "fsl,imx6sx-gpt";
455 clock-names = "ipg", "per";
459 compatible = "fsl,imx6ul-gpio", "fsl,imx35-gpio";
464 gpio-controller;
465 #gpio-cells = <2>;
466 interrupt-controller;
467 #interrupt-cells = <2>;
468 gpio-ranges = <&iomuxc 0 23 10>, <&iomuxc 10 17 6>,
473 compatible = "fsl,imx6ul-gpio", "fsl,imx35-gpio";
478 gpio-controller;
479 #gpio-cells = <2>;
480 interrupt-controller;
481 #interrupt-cells = <2>;
482 gpio-ranges = <&iomuxc 0 49 16>, <&iomuxc 16 111 6>;
486 compatible = "fsl,imx6ul-gpio", "fsl,imx35-gpio";
491 gpio-controller;
492 #gpio-cells = <2>;
493 interrupt-controller;
494 #interrupt-cells = <2>;
495 gpio-ranges = <&iomuxc 0 65 29>;
499 compatible = "fsl,imx6ul-gpio", "fsl,imx35-gpio";
504 gpio-controller;
505 #gpio-cells = <2>;
506 interrupt-controller;
507 #interrupt-cells = <2>;
508 gpio-ranges = <&iomuxc 0 94 17>, <&iomuxc 17 117 12>;
512 compatible = "fsl,imx6ul-gpio", "fsl,imx35-gpio";
517 gpio-controller;
518 #gpio-cells = <2>;
519 interrupt-controller;
520 #interrupt-cells = <2>;
521 gpio-ranges = <&iomuxc 0 7 10>, <&iomuxc 10 5 2>;
525 compatible = "fsl,imx6ul-fec", "fsl,imx6q-fec";
527 interrupt-names = "int0", "pps";
535 clock-names = "ipg", "ahb", "ptp",
537 fsl,num-tx-queues = <1>;
538 fsl,num-rx-queues = <1>;
539 fsl,stop-mode = <&gpr 0x10 4>;
544 compatible = "fsl,imx6ul-kpp", "fsl,imx21-kpp";
552 compatible = "fsl,imx6ul-wdt", "fsl,imx21-wdt";
559 compatible = "fsl,imx6ul-wdt", "fsl,imx21-wdt";
566 clks: clock-controller@20c4000 {
567 compatible = "fsl,imx6ul-ccm";
571 #clock-cells = <1>;
573 clock-names = "ckil", "osc", "ipp_di0", "ipp_di1";
577 compatible = "fsl,imx6ul-anatop", "fsl,imx6q-anatop",
578 "syscon", "simple-mfd";
584 reg_3p0: regulator-3p0 {
585 compatible = "fsl,anatop-regulator";
586 regulator-name = "vdd3p0";
587 regulator-min-microvolt = <2625000>;
588 regulator-max-microvolt = <3400000>;
589 anatop-reg-offset = <0x120>;
590 anatop-vol-bit-shift = <8>;
591 anatop-vol-bit-width = <5>;
592 anatop-min-bit-val = <0>;
593 anatop-min-voltage = <2625000>;
594 anatop-max-voltage = <3400000>;
595 anatop-enable-bit = <0>;
598 reg_arm: regulator-vddcore {
599 compatible = "fsl,anatop-regulator";
600 regulator-name = "cpu";
601 regulator-min-microvolt = <725000>;
602 regulator-max-microvolt = <1450000>;
603 regulator-always-on;
604 anatop-reg-offset = <0x140>;
605 anatop-vol-bit-shift = <0>;
606 anatop-vol-bit-width = <5>;
607 anatop-delay-reg-offset = <0x170>;
608 anatop-delay-bit-shift = <24>;
609 anatop-delay-bit-width = <2>;
610 anatop-min-bit-val = <1>;
611 anatop-min-voltage = <725000>;
612 anatop-max-voltage = <1450000>;
615 reg_soc: regulator-vddsoc {
616 compatible = "fsl,anatop-regulator";
617 regulator-name = "vddsoc";
618 regulator-min-microvolt = <725000>;
619 regulator-max-microvolt = <1450000>;
620 regulator-always-on;
621 anatop-reg-offset = <0x140>;
622 anatop-vol-bit-shift = <18>;
623 anatop-vol-bit-width = <5>;
624 anatop-delay-reg-offset = <0x170>;
625 anatop-delay-bit-shift = <28>;
626 anatop-delay-bit-width = <2>;
627 anatop-min-bit-val = <1>;
628 anatop-min-voltage = <725000>;
629 anatop-max-voltage = <1450000>;
633 compatible = "fsl,imx6ul-tempmon", "fsl,imx6sx-tempmon";
634 interrupt-parent = <&gpc>;
637 nvmem-cells = <&tempmon_calib>, <&tempmon_temp_grade>;
638 nvmem-cell-names = "calib", "temp_grade";
644 compatible = "fsl,imx6ul-usbphy", "fsl,imx23-usbphy";
648 phy-3p0-supply = <®_3p0>;
653 compatible = "fsl,imx6ul-usbphy", "fsl,imx23-usbphy";
657 phy-3p0-supply = <®_3p0>;
662 compatible = "fsl,sec-v4.0-mon", "syscon", "simple-mfd";
665 snvs_rtc: snvs-rtc-lp {
666 compatible = "fsl,sec-v4.0-mon-rtc-lp";
673 snvs_poweroff: snvs-poweroff {
674 compatible = "syscon-poweroff";
682 snvs_pwrkey: snvs-powerkey {
683 compatible = "fsl,sec-v4.0-pwrkey";
687 wakeup-source;
691 snvs_lpgpr: snvs-lpgpr {
692 compatible = "fsl,imx6ul-snvs-lpgpr";
706 src: reset-controller@20d8000 {
707 compatible = "fsl,imx6ul-src", "fsl,imx51-src";
711 #reset-cells = <1>;
715 compatible = "fsl,imx6ul-gpc", "fsl,imx6q-gpc";
717 interrupt-controller;
718 #interrupt-cells = <3>;
720 interrupt-parent = <&intc>;
724 compatible = "fsl,imx6ul-iomuxc";
728 gpr: iomuxc-gpr@20e4000 {
729 compatible = "fsl,imx6ul-iomuxc-gpr",
730 "fsl,imx6q-iomuxc-gpr", "syscon";
735 compatible = "fsl,imx6ul-gpt", "fsl,imx6sx-gpt";
740 clock-names = "ipg", "per";
745 compatible = "fsl,imx6ul-sdma", "fsl,imx6q-sdma",
746 "fsl,imx35-sdma";
751 clock-names = "ipg", "ahb";
752 #dma-cells = <3>;
753 fsl,sdma-ram-script-name = "imx/sdma/sdma-imx6q.bin";
757 compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm";
762 clock-names = "ipg", "per";
763 #pwm-cells = <3>;
768 compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm";
773 clock-names = "ipg", "per";
774 #pwm-cells = <3>;
779 compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm";
784 clock-names = "ipg", "per";
785 #pwm-cells = <3>;
790 compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm";
795 clock-names = "ipg", "per";
796 #pwm-cells = <3>;
802 compatible = "fsl,aips-bus", "simple-bus";
803 #address-cells = <1>;
804 #size-cells = <1>;
809 compatible = "fsl,imx6ul-caam", "fsl,sec-v4.0";
810 #address-cells = <1>;
811 #size-cells = <1>;
817 clock-names = "ipg", "aclk", "mem";
820 compatible = "fsl,sec-v4.0-job-ring";
826 compatible = "fsl,sec-v4.0-job-ring";
832 compatible = "fsl,sec-v4.0-job-ring";
839 compatible = "fsl,imx6ul-usb", "fsl,imx27-usb";
846 ahb-burst-config = <0x0>;
847 tx-burst-size-dword = <0x10>;
848 rx-burst-size-dword = <0x10>;
853 compatible = "fsl,imx6ul-usb", "fsl,imx27-usb";
859 ahb-burst-config = <0x0>;
860 tx-burst-size-dword = <0x10>;
861 rx-burst-size-dword = <0x10>;
866 #index-cells = <1>;
867 compatible = "fsl,imx6ul-usbmisc", "fsl,imx6q-usbmisc";
872 compatible = "fsl,imx6ul-fec", "fsl,imx6q-fec";
874 interrupt-names = "int0", "pps";
882 clock-names = "ipg", "ahb", "ptp",
884 fsl,num-tx-queues = <1>;
885 fsl,num-rx-queues = <1>;
886 fsl,stop-mode = <&gpr 0x10 3>;
891 compatible = "fsl,imx6ul-usdhc", "fsl,imx6sx-usdhc";
897 clock-names = "ipg", "ahb", "per";
898 fsl,tuning-step = <2>;
899 fsl,tuning-start-tap = <20>;
900 bus-width = <4>;
905 compatible = "fsl,imx6ul-usdhc", "fsl,imx6sx-usdhc";
911 clock-names = "ipg", "ahb", "per";
912 bus-width = <4>;
913 fsl,tuning-step = <2>;
914 fsl,tuning-start-tap = <20>;
919 compatible = "fsl,imx6ul-adc", "fsl,vf610-adc";
923 num-channels = <2>;
924 clock-names = "adc";
925 fsl,adck-max-frequency = <30000000>, <40000000>,
930 i2c1: i2c@21a0000 {
931 #address-cells = <1>;
932 #size-cells = <0>;
933 compatible = "fsl,imx6ul-i2c", "fsl,imx21-i2c";
940 i2c2: i2c@21a4000 {
941 #address-cells = <1>;
942 #size-cells = <0>;
943 compatible = "fsl,imx6ul-i2c", "fsl,imx21-i2c";
950 i2c3: i2c@21a8000 {
951 #address-cells = <1>;
952 #size-cells = <0>;
953 compatible = "fsl,imx6ul-i2c", "fsl,imx21-i2c";
960 memory-controller@21b0000 {
961 compatible = "fsl,imx6ul-mmdc", "fsl,imx6q-mmdc";
967 #address-cells = <2>;
968 #size-cells = <1>;
969 compatible = "fsl,imx6ul-weim", "fsl,imx6q-weim";
973 fsl,weim-cs-gpr = <&gpr>;
978 #address-cells = <1>;
979 #size-cells = <1>;
980 compatible = "fsl,imx6ul-ocotp", "syscon";
988 tempmon_temp_grade: temp-grade@20 {
992 cpu_speed_grade: speed-grade@10 {
998 compatible = "fsl,imx6ul-csi";
1002 clock-names = "mclk";
1007 compatible = "fsl,imx6ul-lcdif", "fsl,imx6sx-lcdif";
1013 clock-names = "pix", "axi", "disp_axi";
1018 compatible = "fsl,imx6ul-pxp";
1022 clock-names = "axi";
1026 #address-cells = <1>;
1027 #size-cells = <0>;
1028 compatible = "fsl,imx6ul-qspi";
1030 reg-names = "QuadSPI", "QuadSPI-memory";
1034 clock-names = "qspi_en", "qspi";
1039 compatible = "fsl,imx6ul-wdt", "fsl,imx21-wdt";
1047 compatible = "fsl,imx6ul-uart",
1048 "fsl,imx6q-uart";
1053 clock-names = "ipg", "per";
1058 compatible = "fsl,imx6ul-uart",
1059 "fsl,imx6q-uart";
1064 clock-names = "ipg", "per";
1069 compatible = "fsl,imx6ul-uart",
1070 "fsl,imx6q-uart";
1075 clock-names = "ipg", "per";
1080 compatible = "fsl,imx6ul-uart",
1081 "fsl,imx6q-uart";
1086 clock-names = "ipg", "per";
1090 i2c4: i2c@21f8000 {
1091 #address-cells = <1>;
1092 #size-cells = <0>;
1093 compatible = "fsl,imx6ul-i2c", "fsl,imx21-i2c";
1101 compatible = "fsl,imx6ul-uart",
1102 "fsl,imx6q-uart";
1107 clock-names = "ipg", "per";