Lines Matching +full:0 +full:x40013000
47 reg = <0x10000000 0>;
58 pinctrl-0 = <&pinctrl_hummingboard2_gpio7_9>;
91 pinctrl-0 = <&pinctrl_hummingboard2_vmmc>;
105 pinctrl-0 = <&pinctrl_hummingboard2_usbotg_vbus>;
117 gpio = <&gpio1 0 GPIO_ACTIVE_HIGH>;
119 pinctrl-0 = <&pinctrl_hummingboard2_usbh1_vbus>;
133 pinctrl-0 = <&pinctrl_hummingboard2_usbh2_vbus>;
147 pinctrl-0 = <&pinctrl_hummingboard2_usbh3_vbus>;
183 fsl,audmux-port = <0>;
198 IMX_AUDMUX_V2_PDCR_RXDSEL(0)
205 pinctrl-0 = <&pinctrl_hummingboard2_ecspi2>;
212 pinctrl-0 = <&pinctrl_hummingboard2_hdmi>;
220 pinctrl-0 = <&pinctrl_hummingboard2_i2c1>;
225 reg = <0x68>;
231 #sound-dai-cells = <0>;
233 pinctrl-0 = <&pinctrl_hummingboard2_sgtl5000>;
234 reg = <0x0a>;
244 pinctrl-0 = <&pinctrl_hummingboard2_i2c2>;
251 pinctrl-0 = <&pinctrl_hummingboard2_i2c3>;
257 pinctrl-0 = <&pinctrl_hog>;
287 MX6QDL_PAD_EIM_DA10__GPIO3_IO10 0x400130b1
289 MX6QDL_PAD_EIM_DA11__GPIO3_IO11 0x400130b1
291 MX6QDL_PAD_EIM_DA9__GPIO3_IO09 0x400130b1
293 MX6QDL_PAD_EIM_DA8__GPIO3_IO08 0x400130b1
295 MX6QDL_PAD_EIM_DA7__GPIO3_IO07 0x400130b1
297 MX6QDL_PAD_EIM_DA6__GPIO3_IO06 0x400130b1
299 MX6QDL_PAD_EIM_DA5__GPIO3_IO05 0x400130b1
301 MX6QDL_PAD_EIM_DA4__GPIO3_IO04 0x400130b1
303 MX6QDL_PAD_EIM_DA3__GPIO3_IO03 0x400130b1
305 MX6QDL_PAD_EIM_DA2__GPIO3_IO02 0x400130b1
307 MX6QDL_PAD_EIM_DA13__GPIO3_IO13 0x400130b1
309 MX6QDL_PAD_EIM_DA14__GPIO3_IO14 0x400130b1
311 MX6QDL_PAD_EIM_DA15__GPIO3_IO15 0x400130b1
313 MX6QDL_PAD_EIM_DA12__GPIO3_IO12 0x400130b1
315 MX6QDL_PAD_EIM_DA1__GPIO3_IO01 0x400130b1
317 MX6QDL_PAD_EIM_DA0__GPIO3_IO00 0x400130b1
319 MX6QDL_PAD_EIM_EB1__GPIO2_IO29 0x400130b1
321 MX6QDL_PAD_EIM_EB0__GPIO2_IO28 0x400130b1
323 MX6QDL_PAD_EIM_A17__GPIO2_IO21 0x400130b1
325 MX6QDL_PAD_EIM_A18__GPIO2_IO20 0x400130b1
327 MX6QDL_PAD_EIM_A19__GPIO2_IO19 0x400130b1
329 MX6QDL_PAD_EIM_A20__GPIO2_IO18 0x400130b1
331 MX6QDL_PAD_EIM_A21__GPIO2_IO17 0x400130b1
333 MX6QDL_PAD_EIM_A22__GPIO2_IO16 0x400130b1
335 MX6QDL_PAD_EIM_A23__GPIO6_IO06 0x400130b1
337 MX6QDL_PAD_EIM_A24__GPIO5_IO04 0x400130b1
339 MX6QDL_PAD_EIM_D31__GPIO3_IO31 0x400130b1
341 MX6QDL_PAD_EIM_D30__GPIO3_IO30 0x400130b1
343 MX6QDL_PAD_EIM_D26__GPIO3_IO26 0x400130b1
345 MX6QDL_PAD_EIM_D27__GPIO3_IO27 0x400130b1
347 MX6QDL_PAD_EIM_A16__GPIO2_IO22 0x400130b1
349 MX6QDL_PAD_ENET_RX_ER__GPIO1_IO24 0x400130b1
351 MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x400130b1
354 MX6QDL_PAD_EIM_LBA__GPIO2_IO27 0x400130b1
360 MX6QDL_PAD_EIM_OE__ECSPI2_MISO 0x100b1
361 MX6QDL_PAD_EIM_CS1__ECSPI2_MOSI 0x100b1
362 MX6QDL_PAD_EIM_CS0__ECSPI2_SCLK 0x100b1
363 MX6QDL_PAD_EIM_RW__GPIO2_IO26 0x000b1 /* CS */
369 MX6QDL_PAD_SD4_CMD__GPIO7_IO09 0x80000000
375 MX6QDL_PAD_KEY_ROW2__HDMI_TX_CEC_LINE 0x1f8b0
381 MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
382 MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
388 MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
389 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
395 MX6QDL_PAD_EIM_D17__I2C3_SCL 0x4001b8b1
396 MX6QDL_PAD_EIM_D18__I2C3_SDA 0x4001b8b1
402 MX6QDL_PAD_SD4_DAT2__GPIO2_IO10 0x4001b8b1
403 MX6QDL_PAD_KEY_COL4__GPIO4_IO14 0x4001b8b1
404 MX6QDL_PAD_NANDF_CS2__CCM_CLKO2 0x130b0
410 MX6QDL_PAD_SD4_DAT3__GPIO2_IO11 0x1b0b1
416 MX6QDL_PAD_DISP0_DAT8__PWM1_OUT 0x1b0b1
422 MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x1b0b1
428 MX6QDL_PAD_DISP0_DAT19__AUD5_RXD 0x130b0
429 MX6QDL_PAD_KEY_COL0__AUD5_TXC 0x130b0
430 MX6QDL_PAD_KEY_ROW0__AUD5_TXD 0x110b0
431 MX6QDL_PAD_KEY_COL1__AUD5_TXFS 0x130b0
432 MX6QDL_PAD_GPIO_5__CCM_CLKO1 0x130b0
437 fsl,pins = <MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x1b0b0>;
441 fsl,pins = <MX6QDL_PAD_SD4_DAT5__GPIO2_IO13 0x1b0b0>;
445 fsl,pins = <MX6QDL_PAD_SD4_CLK__GPIO7_IO10 0x1b0b0>;
452 fsl,pins = <MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x13059>;
456 fsl,pins = <MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0>;
461 MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1f071
462 MX6QDL_PAD_KEY_ROW1__SD2_VSELECT 0x1b071
468 MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059
469 MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059
470 MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059
471 MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
472 MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
473 MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x13059
479 MX6QDL_PAD_SD2_CMD__SD2_CMD 0x170b9
480 MX6QDL_PAD_SD2_CLK__SD2_CLK 0x100b9
481 MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x170b9
482 MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x170b9
483 MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x170b9
484 MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x130b9
490 MX6QDL_PAD_SD2_CMD__SD2_CMD 0x170f9
491 MX6QDL_PAD_SD2_CLK__SD2_CLK 0x100f9
492 MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x170f9
493 MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x170f9
494 MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x170f9
495 MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x130f9
501 MX6QDL_PAD_DISP0_DAT9__GPIO4_IO30 0x1b0b0
507 MX6QDL_PAD_EIM_D25__UART3_TX_DATA 0x1b0b1
508 MX6QDL_PAD_EIM_D24__UART3_RX_DATA 0x40013000
516 pinctrl-0 = <&pinctrl_hummingboard2_pcie_reset>;
523 pinctrl-0 = <&pinctrl_hummingboard2_pwm1>;
529 pinctrl-0 = <&pinctrl_hummingboard2_pwm3>;
545 pinctrl-0 = <&pinctrl_hummingboard2_usbotg_id>;
552 pinctrl-0 = <
571 pinctrl-0 = <&pinctrl_hummingboard2_uart3>;