Lines Matching +full:pinctrl +full:- +full:0
1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
3 * Copyright 2014-2020 Toradex
8 #include <dt-bindings/gpio/gpio.h>
17 reg = <0x10000000 0>;
21 compatible = "pwm-backlight";
22 pinctrl-names = "default";
23 pinctrl-0 = <&pinctrl_gpio_bl_on>;
24 pwms = <&pwm4 0 5000000>;
25 enable-gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>;
29 reg_module_3v3: regulator-module-3v3 {
30 compatible = "regulator-fixed";
31 regulator-name = "+V3.3";
32 regulator-min-microvolt = <3300000>;
33 regulator-max-microvolt = <3300000>;
34 regulator-always-on;
37 reg_module_3v3_audio: regulator-module-3v3-audio {
38 compatible = "regulator-fixed";
39 regulator-name = "+V3.3_AUDIO";
40 regulator-min-microvolt = <3300000>;
41 regulator-max-microvolt = <3300000>;
42 regulator-always-on;
45 reg_usb_otg_vbus: regulator-usb-otg-vbus {
46 compatible = "regulator-fixed";
47 pinctrl-names = "default";
48 pinctrl-0 = <&pinctrl_regulator_usbotg_pwr>;
49 regulator-name = "usb_otg_vbus";
50 regulator-min-microvolt = <5000000>;
51 regulator-max-microvolt = <5000000>;
53 enable-active-high;
58 reg_usb_host_vbus_hub: regulator-usb-host-vbus-hub {
59 compatible = "regulator-fixed";
60 pinctrl-names = "default";
61 pinctrl-0 = <&pinctrl_regulator_usbhub_pwr>;
62 regulator-name = "usb_host_vbus_hub";
63 regulator-min-microvolt = <5000000>;
64 regulator-max-microvolt = <5000000>;
66 startup-delay-us = <2000>;
67 enable-active-high;
71 reg_usb_host_vbus: regulator-usb-host-vbus {
72 compatible = "regulator-fixed";
73 pinctrl-names = "default";
74 pinctrl-0 = <&pinctrl_regulator_usbh_pwr>;
75 regulator-name = "usb_host_vbus";
76 regulator-min-microvolt = <5000000>;
77 regulator-max-microvolt = <5000000>;
78 gpio = <&gpio1 0 GPIO_ACTIVE_HIGH>;
79 enable-active-high;
80 vin-supply = <®_usb_host_vbus_hub>;
85 compatible = "fsl,imx-audio-sgtl5000";
86 model = "imx6q-apalis-sgtl5000";
87 ssi-controller = <&ssi1>;
88 audio-codec = <&codec>;
89 audio-routing =
94 mux-int-port = <1>;
95 mux-ext-port = <4>;
98 sound_spdif: sound-spdif {
99 compatible = "fsl,imx-audio-spdif";
100 model = "imx-spdif";
101 spdif-controller = <&spdif>;
102 spdif-in;
103 spdif-out;
109 pinctrl-names = "default";
110 pinctrl-0 = <&pinctrl_audmux>;
115 pinctrl-names = "default", "sleep";
116 pinctrl-0 = <&pinctrl_flexcan1_default>;
117 pinctrl-1 = <&pinctrl_flexcan1_sleep>;
122 pinctrl-names = "default", "sleep";
123 pinctrl-0 = <&pinctrl_flexcan2_default>;
124 pinctrl-1 = <&pinctrl_flexcan2_sleep>;
130 cs-gpios = <&gpio5 25 GPIO_ACTIVE_LOW>;
131 pinctrl-names = "default";
132 pinctrl-0 = <&pinctrl_ecspi1>;
138 cs-gpios = <&gpio2 26 GPIO_ACTIVE_LOW>;
139 pinctrl-names = "default";
140 pinctrl-0 = <&pinctrl_ecspi2>;
145 pinctrl-names = "default";
146 pinctrl-0 = <&pinctrl_enet>;
147 phy-mode = "rgmii-id";
148 phy-handle = <ðphy>;
149 phy-reset-duration = <10>;
150 phy-reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>;
154 #address-cells = <1>;
155 #size-cells = <0>;
157 ethphy: ethernet-phy@7 {
158 interrupt-parent = <&gpio1>;
166 pinctrl-names = "default";
167 pinctrl-0 = <&pinctrl_hdmi_ddc &pinctrl_hdmi_cec>;
173 clock-frequency = <100000>;
174 pinctrl-names = "default", "gpio";
175 pinctrl-0 = <&pinctrl_i2c1>;
176 pinctrl-1 = <&pinctrl_i2c1_gpio>;
177 scl-gpios = <&gpio5 27 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
178 sda-gpios = <&gpio5 26 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
187 clock-frequency = <100000>;
188 pinctrl-names = "default", "gpio";
189 pinctrl-0 = <&pinctrl_i2c2>;
190 pinctrl-1 = <&pinctrl_i2c2_gpio>;
191 scl-gpios = <&gpio4 12 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
192 sda-gpios = <&gpio4 13 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
197 reg = <0x08>;
201 regulator-min-microvolt = <300000>;
202 regulator-max-microvolt = <1875000>;
203 regulator-boot-on;
204 regulator-always-on;
205 regulator-ramp-delay = <6250>;
209 regulator-min-microvolt = <300000>;
210 regulator-max-microvolt = <1875000>;
211 regulator-boot-on;
212 regulator-always-on;
213 regulator-ramp-delay = <6250>;
217 regulator-min-microvolt = <400000>;
218 regulator-max-microvolt = <1975000>;
219 regulator-boot-on;
220 regulator-always-on;
224 regulator-min-microvolt = <5000000>;
225 regulator-max-microvolt = <5150000>;
226 regulator-boot-on;
227 regulator-always-on;
231 regulator-min-microvolt = <1000000>;
232 regulator-max-microvolt = <3000000>;
233 regulator-boot-on;
234 regulator-always-on;
238 regulator-boot-on;
239 regulator-always-on;
243 regulator-min-microvolt = <800000>;
244 regulator-max-microvolt = <1550000>;
245 regulator-boot-on;
246 regulator-always-on;
250 regulator-min-microvolt = <800000>;
251 regulator-max-microvolt = <1550000>;
252 regulator-boot-on;
253 regulator-always-on;
257 regulator-min-microvolt = <1800000>;
258 regulator-max-microvolt = <3300000>;
259 regulator-boot-on;
260 regulator-always-on;
264 regulator-min-microvolt = <1800000>;
265 regulator-max-microvolt = <1800000>;
266 regulator-boot-on;
267 regulator-always-on;
271 regulator-min-microvolt = <1800000>;
272 regulator-max-microvolt = <3300000>;
273 regulator-boot-on;
274 regulator-always-on;
278 regulator-min-microvolt = <1800000>;
279 regulator-max-microvolt = <3300000>;
280 regulator-boot-on;
281 regulator-always-on;
288 reg = <0x0a>;
289 pinctrl-names = "default";
290 pinctrl-0 = <&pinctrl_sgtl5000>;
292 VDDA-supply = <®_module_3v3_audio>;
293 VDDIO-supply = <®_module_3v3>;
294 VDDD-supply = <&vgen4_reg>;
300 pinctrl-names = "default";
301 pinctrl-0 = <&pinctrl_touch_int>;
302 reg = <0x41>;
304 interrupt-parent = <&gpio4>;
305 interrupt-controller;
306 id = <0>;
307 blocks = <0x5>;
308 irq-trigger = <0x1>;
310 st,adc-freq = <1>;
311 /* 12-bit ADC */
312 st,mod-12b = <1>;
314 st,ref-sel = <0>;
316 st,sample-time = <4>;
319 compatible = "st,stmpe-ts";
321 st,ave-ctrl = <3>;
323 st,fraction-z = <7>;
328 st,i-drive = <1>;
332 st,touch-det-delay = <5>;
336 compatible = "st,stmpe-adc";
337 /* forbid to use ADC channels 3-0 (touch) */
338 st,norequest-mask = <0x0F>;
348 clock-frequency = <100000>;
349 pinctrl-names = "default", "gpio";
350 pinctrl-0 = <&pinctrl_i2c3>;
351 pinctrl-1 = <&pinctrl_i2c3_gpio>;
352 scl-gpios = <&gpio3 17 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
353 sda-gpios = <&gpio3 18 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
358 pinctrl-names = "default";
359 pinctrl-0 = <&pinctrl_pwm1>;
364 pinctrl-names = "default";
365 pinctrl-0 = <&pinctrl_pwm2>;
370 pinctrl-names = "default";
371 pinctrl-0 = <&pinctrl_pwm3>;
376 #pwm-cells = <2>;
377 pinctrl-names = "default";
378 pinctrl-0 = <&pinctrl_pwm4>;
383 pinctrl-names = "default";
384 pinctrl-0 = <&pinctrl_spdif>;
393 pinctrl-names = "default";
394 pinctrl-0 = <&pinctrl_uart1_dte &pinctrl_uart1_ctrl>;
395 fsl,dte-mode;
396 uart-has-rtscts;
401 pinctrl-names = "default";
402 pinctrl-0 = <&pinctrl_uart2_dte>;
403 fsl,dte-mode;
404 uart-has-rtscts;
409 pinctrl-names = "default";
410 pinctrl-0 = <&pinctrl_uart4_dte>;
411 fsl,dte-mode;
416 pinctrl-names = "default";
417 pinctrl-0 = <&pinctrl_uart5_dte>;
418 fsl,dte-mode;
423 pinctrl-names = "default";
424 pinctrl-0 = <&pinctrl_usbotg>;
425 disable-over-current;
431 pinctrl-names = "default";
432 pinctrl-0 = <&pinctrl_usdhc1_4bit &pinctrl_usdhc1_8bit>;
433 vqmmc-supply = <®_module_3v3>;
434 bus-width = <8>;
435 disable-wp;
436 no-1-8-v;
442 pinctrl-names = "default";
443 pinctrl-0 = <&pinctrl_usdhc2>;
444 vqmmc-supply = <®_module_3v3>;
445 bus-width = <4>;
446 disable-wp;
447 no-1-8-v;
453 pinctrl-names = "default";
454 pinctrl-0 = <&pinctrl_usdhc3>;
455 vqmmc-supply = <®_module_3v3>;
456 bus-width = <8>;
457 no-1-8-v;
458 non-removable;
469 MX6QDL_PAD_NANDF_D4__GPIO2_IO04 0x130b0
475 MX6QDL_PAD_NANDF_D5__GPIO2_IO05 0x130b0
481 MX6QDL_PAD_NANDF_D6__GPIO2_IO06 0x130b0
487 MX6QDL_PAD_NANDF_D7__GPIO2_IO07 0x130b0
493 MX6QDL_PAD_NANDF_RB0__GPIO6_IO10 0x130b0
499 MX6QDL_PAD_NANDF_WP_B__GPIO6_IO09 0x130b0
505 MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x130b0
511 MX6QDL_PAD_GPIO_6__GPIO1_IO06 0x130b0
517 MX6QDL_PAD_DISP0_DAT20__AUD4_TXC 0x130b0
518 MX6QDL_PAD_DISP0_DAT21__AUD4_TXD 0x130b0
519 MX6QDL_PAD_DISP0_DAT22__AUD4_TXFS 0x130b0
520 MX6QDL_PAD_DISP0_DAT23__AUD4_RXD 0x130b0
527 MX6QDL_PAD_NANDF_CS2__CCM_CLKO2 0x00b0
533 MX6QDL_PAD_CSI0_DAT6__ECSPI1_MISO 0x100b1
534 MX6QDL_PAD_CSI0_DAT5__ECSPI1_MOSI 0x100b1
535 MX6QDL_PAD_CSI0_DAT4__ECSPI1_SCLK 0x100b1
537 MX6QDL_PAD_CSI0_DAT7__GPIO5_IO25 0x000b1
543 MX6QDL_PAD_EIM_OE__ECSPI2_MISO 0x100b1
544 MX6QDL_PAD_EIM_CS1__ECSPI2_MOSI 0x100b1
545 MX6QDL_PAD_EIM_CS0__ECSPI2_SCLK 0x100b1
547 MX6QDL_PAD_EIM_RW__GPIO2_IO26 0x000b1
553 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x100b0
554 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x100b0
555 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x10030
556 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x10030
557 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x10030
558 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x10030
559 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x10030
560 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x10030
561 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x100b0
562 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
563 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
564 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
565 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
566 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
567 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
569 MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x000b0
571 MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x000b1
577 MX6QDL_PAD_GPIO_7__FLEXCAN1_TX 0x1b0b0
578 MX6QDL_PAD_GPIO_8__FLEXCAN1_RX 0x1b0b0
584 MX6QDL_PAD_GPIO_7__GPIO1_IO07 0x0
585 MX6QDL_PAD_GPIO_8__GPIO1_IO08 0x0
591 MX6QDL_PAD_KEY_COL4__FLEXCAN2_TX 0x1b0b0
592 MX6QDL_PAD_KEY_ROW4__FLEXCAN2_RX 0x1b0b0
597 MX6QDL_PAD_KEY_COL4__GPIO4_IO14 0x0
598 MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x0
604 MX6QDL_PAD_EIM_DA13__GPIO3_IO13 0x1b0b0
611 MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1b0b0
617 MX6QDL_PAD_KEY_ROW2__HDMI_TX_CEC_LINE 0x1f8b0
623 MX6QDL_PAD_EIM_EB2__HDMI_TX_DDC_SCL 0x4001b8b1
624 MX6QDL_PAD_EIM_D16__HDMI_TX_DDC_SDA 0x4001b8b1
630 MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b8b1
631 MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b8b1
637 MX6QDL_PAD_CSI0_DAT8__GPIO5_IO26 0x4001b8b1
638 MX6QDL_PAD_CSI0_DAT9__GPIO5_IO27 0x4001b8b1
644 MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
645 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
651 MX6QDL_PAD_KEY_COL3__GPIO4_IO12 0x4001b8b1
652 MX6QDL_PAD_KEY_ROW3__GPIO4_IO13 0x4001b8b1
658 MX6QDL_PAD_EIM_D17__I2C3_SCL 0x4001b8b1
659 MX6QDL_PAD_EIM_D18__I2C3_SDA 0x4001b8b1
665 MX6QDL_PAD_EIM_D17__GPIO3_IO17 0x4001b8b1
666 MX6QDL_PAD_EIM_D18__GPIO3_IO18 0x4001b8b1
672 MX6QDL_PAD_CSI0_DAT12__IPU1_CSI0_DATA12 0xb0b1
673 MX6QDL_PAD_CSI0_DAT13__IPU1_CSI0_DATA13 0xb0b1
674 MX6QDL_PAD_CSI0_DAT14__IPU1_CSI0_DATA14 0xb0b1
675 MX6QDL_PAD_CSI0_DAT15__IPU1_CSI0_DATA15 0xb0b1
676 MX6QDL_PAD_CSI0_DAT16__IPU1_CSI0_DATA16 0xb0b1
677 MX6QDL_PAD_CSI0_DAT17__IPU1_CSI0_DATA17 0xb0b1
678 MX6QDL_PAD_CSI0_DAT18__IPU1_CSI0_DATA18 0xb0b1
679 MX6QDL_PAD_CSI0_DAT19__IPU1_CSI0_DATA19 0xb0b1
680 MX6QDL_PAD_CSI0_PIXCLK__IPU1_CSI0_PIXCLK 0xb0b1
681 MX6QDL_PAD_CSI0_MCLK__IPU1_CSI0_HSYNC 0xb0b1
682 MX6QDL_PAD_CSI0_VSYNC__IPU1_CSI0_VSYNC 0xb0b1
688 MX6QDL_PAD_EIM_A16__IPU1_DI1_DISP_CLK 0x61
690 MX6QDL_PAD_EIM_DA10__IPU1_DI1_PIN15 0x61
692 MX6QDL_PAD_EIM_DA11__IPU1_DI1_PIN02 0x61
694 MX6QDL_PAD_EIM_DA12__IPU1_DI1_PIN03 0x61
695 MX6QDL_PAD_EIM_DA9__IPU1_DISP1_DATA00 0x61
696 MX6QDL_PAD_EIM_DA8__IPU1_DISP1_DATA01 0x61
697 MX6QDL_PAD_EIM_DA7__IPU1_DISP1_DATA02 0x61
698 MX6QDL_PAD_EIM_DA6__IPU1_DISP1_DATA03 0x61
699 MX6QDL_PAD_EIM_DA5__IPU1_DISP1_DATA04 0x61
700 MX6QDL_PAD_EIM_DA4__IPU1_DISP1_DATA05 0x61
701 MX6QDL_PAD_EIM_DA3__IPU1_DISP1_DATA06 0x61
702 MX6QDL_PAD_EIM_DA2__IPU1_DISP1_DATA07 0x61
703 MX6QDL_PAD_EIM_DA1__IPU1_DISP1_DATA08 0x61
704 MX6QDL_PAD_EIM_DA0__IPU1_DISP1_DATA09 0x61
705 MX6QDL_PAD_EIM_EB1__IPU1_DISP1_DATA10 0x61
706 MX6QDL_PAD_EIM_EB0__IPU1_DISP1_DATA11 0x61
707 MX6QDL_PAD_EIM_A17__IPU1_DISP1_DATA12 0x61
708 MX6QDL_PAD_EIM_A18__IPU1_DISP1_DATA13 0x61
709 MX6QDL_PAD_EIM_A19__IPU1_DISP1_DATA14 0x61
710 MX6QDL_PAD_EIM_A20__IPU1_DISP1_DATA15 0x61
711 MX6QDL_PAD_EIM_A21__IPU1_DISP1_DATA16 0x61
712 MX6QDL_PAD_EIM_A22__IPU1_DISP1_DATA17 0x61
713 MX6QDL_PAD_EIM_A23__IPU1_DISP1_DATA18 0x61
714 MX6QDL_PAD_EIM_A24__IPU1_DISP1_DATA19 0x61
715 MX6QDL_PAD_EIM_D31__IPU1_DISP1_DATA20 0x61
716 MX6QDL_PAD_EIM_D30__IPU1_DISP1_DATA21 0x61
717 MX6QDL_PAD_EIM_D26__IPU1_DISP1_DATA22 0x61
718 MX6QDL_PAD_EIM_D27__IPU1_DISP1_DATA23 0x61
724 MX6QDL_PAD_DI0_DISP_CLK__IPU2_DI0_DISP_CLK 0xd1
725 MX6QDL_PAD_DI0_PIN15__IPU2_DI0_PIN15 0xd1
726 MX6QDL_PAD_DI0_PIN2__IPU2_DI0_PIN02 0xd1
727 MX6QDL_PAD_DI0_PIN3__IPU2_DI0_PIN03 0xd1
728 MX6QDL_PAD_DISP0_DAT0__IPU2_DISP0_DATA00 0xf9
729 MX6QDL_PAD_DISP0_DAT1__IPU2_DISP0_DATA01 0xf9
730 MX6QDL_PAD_DISP0_DAT2__IPU2_DISP0_DATA02 0xf9
731 MX6QDL_PAD_DISP0_DAT3__IPU2_DISP0_DATA03 0xf9
732 MX6QDL_PAD_DISP0_DAT4__IPU2_DISP0_DATA04 0xf9
733 MX6QDL_PAD_DISP0_DAT5__IPU2_DISP0_DATA05 0xf9
734 MX6QDL_PAD_DISP0_DAT6__IPU2_DISP0_DATA06 0xf9
735 MX6QDL_PAD_DISP0_DAT7__IPU2_DISP0_DATA07 0xf9
736 MX6QDL_PAD_DISP0_DAT8__IPU2_DISP0_DATA08 0xf9
737 MX6QDL_PAD_DISP0_DAT9__IPU2_DISP0_DATA09 0xf9
738 MX6QDL_PAD_DISP0_DAT10__IPU2_DISP0_DATA10 0xf9
739 MX6QDL_PAD_DISP0_DAT11__IPU2_DISP0_DATA11 0xf9
740 MX6QDL_PAD_DISP0_DAT12__IPU2_DISP0_DATA12 0xf9
741 MX6QDL_PAD_DISP0_DAT13__IPU2_DISP0_DATA13 0xf9
742 MX6QDL_PAD_DISP0_DAT14__IPU2_DISP0_DATA14 0xf9
743 MX6QDL_PAD_DISP0_DAT15__IPU2_DISP0_DATA15 0xf9
750 MX6QDL_PAD_DI0_PIN4__GPIO4_IO20 0x000b0
756 MX6QDL_PAD_GPIO_9__PWM1_OUT 0x1b0b1
762 MX6QDL_PAD_GPIO_1__PWM2_OUT 0x1b0b1
768 MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x1b0b1
774 MX6QDL_PAD_SD4_DAT2__PWM4_OUT 0x1b0b1
781 MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x0f058
788 MX6QDL_PAD_EIM_D28__GPIO3_IO28 0x0f058
795 MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x0f058
802 MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x0f058
809 MX6QDL_PAD_NANDF_CS1__GPIO6_IO14 0x000b0
815 MX6QDL_PAD_GPIO_5__CCM_CLKO1 0x130b0
821 MX6QDL_PAD_GPIO_16__SPDIF_IN 0x1b0b0
822 MX6QDL_PAD_GPIO_17__SPDIF_OUT 0x1b0b0
829 MX6QDL_PAD_KEY_COL2__GPIO4_IO10 0x1b0b0
835 MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1
836 MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1
843 MX6QDL_PAD_CSI0_DAT10__UART1_RX_DATA 0x1b0b1
844 MX6QDL_PAD_CSI0_DAT11__UART1_TX_DATA 0x1b0b1
845 MX6QDL_PAD_EIM_D19__UART1_RTS_B 0x1b0b1
846 MX6QDL_PAD_EIM_D20__UART1_CTS_B 0x1b0b1
853 MX6QDL_PAD_EIM_D23__UART1_DCD_B 0x1b0b0
854 MX6QDL_PAD_EIM_D24__UART1_DTR_B 0x1b0b0
855 MX6QDL_PAD_EIM_D25__UART1_DSR_B 0x1b0b0
861 MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
862 MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
869 MX6QDL_PAD_SD4_DAT4__UART2_TX_DATA 0x1b0b1
870 MX6QDL_PAD_SD4_DAT7__UART2_RX_DATA 0x1b0b1
871 MX6QDL_PAD_SD4_DAT6__UART2_RTS_B 0x1b0b1
872 MX6QDL_PAD_SD4_DAT5__UART2_CTS_B 0x1b0b1
878 MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1
879 MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1
886 MX6QDL_PAD_KEY_COL0__UART4_RX_DATA 0x1b0b1
887 MX6QDL_PAD_KEY_ROW0__UART4_TX_DATA 0x1b0b1
893 MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1
894 MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
901 MX6QDL_PAD_KEY_COL1__UART5_RX_DATA 0x1b0b1
902 MX6QDL_PAD_KEY_ROW1__UART5_TX_DATA 0x1b0b1
908 MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
914 MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17071
915 MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10071
916 MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17071
917 MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17071
918 MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17071
919 MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17071
925 MX6QDL_PAD_NANDF_D0__SD1_DATA4 0x17071
926 MX6QDL_PAD_NANDF_D1__SD1_DATA5 0x17071
927 MX6QDL_PAD_NANDF_D2__SD1_DATA6 0x17071
928 MX6QDL_PAD_NANDF_D3__SD1_DATA7 0x17071
934 MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17071
935 MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10071
936 MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17071
937 MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17071
938 MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17071
939 MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17071
945 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
946 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
947 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
948 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
949 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
950 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
951 MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059
952 MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059
953 MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059
954 MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059
956 MX6QDL_PAD_SD3_RST__SD3_RESET 0x17059