Lines Matching +full:dra72 +full:- +full:cal
1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2014 Texas Instruments Incorporated - https://www.ti.com/
11 compatible = "ti,dra722", "ti,dra72", "ti,dra7";
20 compatible = "arm,cortex-a15-pmu";
21 interrupt-parent = <&wakeupgen>;
27 target-module@5b000 { /* 0x4845b000, ap 59 46.0 */
28 compatible = "ti,sysc-omap4", "ti,sysc";
31 reg-names = "rev", "sysc";
32 ti,sysc-midle = <SYSC_IDLE_FORCE>,
34 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
37 clock-names = "fck";
38 #address-cells = <1>;
39 #size-cells = <1>;
42 cal: cal@0 { label
43 compatible = "ti,dra72-cal";
47 reg-names = "cal_top",
51 ti,camerrx-control = <&scm_conf 0xE94>;
54 #address-cells = <1>;
55 #size-cells = <0>;
72 reg-names = "dss", "pll1_clkctrl", "pll1";
76 clock-names = "fck", "video1_clk";
80 mbox_ipu1_ipc3x: mbox-ipu1-ipc3x {
81 ti,mbox-tx = <6 2 2>;
82 ti,mbox-rx = <4 2 2>;
85 mbox_dsp1_ipc3x: mbox-dsp1-ipc3x {
86 ti,mbox-tx = <5 2 2>;
87 ti,mbox-rx = <1 2 2>;
93 mbox_ipu2_ipc3x: mbox-ipu2-ipc3x {
94 ti,mbox-tx = <6 2 2>;
95 ti,mbox-rx = <4 2 2>;
101 compatible = "ti,dra726-pcie-rc", "ti,dra7-pcie";
105 compatible = "ti,dra726-pcie-ep", "ti,dra7-pcie-ep";
109 compatible = "ti,dra726-pcie-rc", "ti,dra7-pcie";