boot/dts/aspeed-g5.dtsi

63 			clocks = <&syscon ASPEED_CLK_AHB>;
92 			clocks = <&syscon ASPEED_CLK_AHB>;
114 			clocks = <&syscon ASPEED_CLK_AHB>;
149 			clocks = <&syscon ASPEED_CLK_GATE_MAC1CLK>;
157 			clocks = <&syscon ASPEED_CLK_GATE_MAC2CLK>;
165 			clocks = <&syscon ASPEED_CLK_GATE_USBPORT1CLK>;
175 			clocks = <&syscon ASPEED_CLK_GATE_USBPORT2CLK>;
186 			clocks = <&syscon ASPEED_CLK_GATE_USBUHCICLK>;
198 			clocks = <&syscon ASPEED_CLK_GATE_USBPORT1CLK>;
219 			syscon: syscon@1e6e2000 {  label
220 				compatible = "aspeed,ast2500-scu", "syscon", "simple-mfd";
257 				compatible = "aspeed,ast2500-gfx", "syscon";
260 				clocks = <&syscon ASPEED_CLK_GATE_D1CLK>;
261 				resets = <&syscon ASPEED_RESET_CRT1>;
269 				clocks = <&syscon ASPEED_CLK_GATE_BCLK>;
270 				resets = <&syscon ASPEED_RESET_XDMA>;
273 				aspeed,scu = <&syscon>;
280 				clocks = <&syscon ASPEED_CLK_APB>;
281 				resets = <&syscon ASPEED_RESET_ADC>;
289 				clocks = <&syscon ASPEED_CLK_GATE_VCLK>,
290 					 <&syscon ASPEED_CLK_GATE_ECLK>;
307 				clocks = <&syscon ASPEED_CLK_GATE_SDCLK>;
315 					clocks = <&syscon ASPEED_CLK_SDIO>;
324 					clocks = <&syscon ASPEED_CLK_SDIO>;
336 				clocks = <&syscon ASPEED_CLK_APB>;
347 				clocks = <&syscon ASPEED_CLK_APB>;
367 				clocks = <&syscon ASPEED_CLK_APB>;
376 				clocks = <&syscon ASPEED_CLK_GATE_UART1CLK>;
387 				clocks = <&syscon ASPEED_CLK_GATE_UART5CLK>;
395 				clocks = <&syscon ASPEED_CLK_APB>;
401 				clocks = <&syscon ASPEED_CLK_APB>;
407 				clocks = <&syscon ASPEED_CLK_APB>;
416 				clocks = <&syscon ASPEED_CLK_24M>;
417 				resets = <&syscon ASPEED_RESET_PWM>;
426 				clocks = <&syscon ASPEED_CLK_APB>;
440 					compatible = "aspeed,ast2500-lpc-bmc", "simple-mfd", "syscon";
469 					compatible = "aspeed,ast2500-lpc-host", "simple-mfd", "syscon";
487 						clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
495 						clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
525 				clocks = <&syscon ASPEED_CLK_GATE_UART2CLK>;
536 				clocks = <&syscon ASPEED_CLK_GATE_UART3CLK>;
547 				clocks = <&syscon ASPEED_CLK_GATE_UART4CLK>;
579 		clocks = <&syscon ASPEED_CLK_APB>;
580 		resets = <&syscon ASPEED_RESET_I2C>;
595 		clocks = <&syscon ASPEED_CLK_APB>;
596 		resets = <&syscon ASPEED_RESET_I2C>;
611 		clocks = <&syscon ASPEED_CLK_APB>;
612 		resets = <&syscon ASPEED_RESET_I2C>;
628 		clocks = <&syscon ASPEED_CLK_APB>;
629 		resets = <&syscon ASPEED_RESET_I2C>;
645 		clocks = <&syscon ASPEED_CLK_APB>;
646 		resets = <&syscon ASPEED_RESET_I2C>;
662 		clocks = <&syscon ASPEED_CLK_APB>;
663 		resets = <&syscon ASPEED_RESET_I2C>;
679 		clocks = <&syscon ASPEED_CLK_APB>;
680 		resets = <&syscon ASPEED_RESET_I2C>;
696 		clocks = <&syscon ASPEED_CLK_APB>;
697 		resets = <&syscon ASPEED_RESET_I2C>;
713 		clocks = <&syscon ASPEED_CLK_APB>;
714 		resets = <&syscon ASPEED_RESET_I2C>;
730 		clocks = <&syscon ASPEED_CLK_APB>;
731 		resets = <&syscon ASPEED_RESET_I2C>;
747 		clocks = <&syscon ASPEED_CLK_APB>;
748 		resets = <&syscon ASPEED_RESET_I2C>;
764 		clocks = <&syscon ASPEED_CLK_APB>;
765 		resets = <&syscon ASPEED_RESET_I2C>;
781 		clocks = <&syscon ASPEED_CLK_APB>;
782 		resets = <&syscon ASPEED_RESET_I2C>;
798 		clocks = <&syscon ASPEED_CLK_APB>;
799 		resets = <&syscon ASPEED_RESET_I2C>;