Lines Matching +full:regulator +full:- +full:v7

1 // SPDX-License-Identifier: GPL-2.0+
4 /dts-v1/;
6 #include "aspeed-g5.dtsi"
7 #include <dt-bindings/gpio/aspeed-gpio.h>
8 #include <dt-bindings/i2c/i2c.h>
12 compatible = "facebook,tiogapass-bmc", "aspeed,ast2500";
39 stdout-path = &uart5;
47 iio-hwmon {
48 compatible = "iio-hwmon";
49 io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>,
59 m25p,fast-read;
60 #include "openbmc-flash-layout.dtsi"
66 pinctrl-names = "default";
67 pinctrl-0 = <&pinctrl_spi1_default>;
70 m25p,fast-read;
77 snoop-ports = <0x80>;
88 pinctrl-names = "default";
89 pinctrl-0 = <&pinctrl_txd1_default
111 aspeed,lpc-io-reg = <0xca8>;
117 aspeed,lpc-io-reg = <0xca2>;
122 gpio-line-names =
123 /*A0-A7*/ "BMC_CPLD_FPGA_SEL","","","","","","","",
124 /*B0-B7*/ "","BMC_DEBUG_EN","","","","BMC_PPIN","PS_PWROK",
126 /*C0-C7*/ "","","","","","","","",
127 /*D0-D7*/ "BIOS_MRC_DEBUG_MSG_DIS","BOARD_REV_ID0","",
130 /*E0-E7*/ "RESET_BUTTON","RESET_OUT","POWER_BUTTON",
133 /*F0-F7*/ "IRQ_PVDDQ_ABC_VRHOT_LVT3","",
137 /*G0-G7*/ "CPU_ERR2_LVT3","CPU_CATERR_LVT3","PCH_BMC_THERMTRIP",
139 /*H0-H7*/ "LED_POST_CODE_0","LED_POST_CODE_1","LED_POST_CODE_2",
142 /*I0-I7*/ "CPU0_FIVR_FAULT_LVT3","CPU1_FIVR_FAULT_LVT3",
144 /*J0-J7*/ "","","","","","","","",
145 /*K0-K7*/ "","","","","","","","",
146 /*L0-L7*/ "IRQ_UV_DETECT","IRQ_OC_DETECT","HSC_TIMER_EXP","",
148 /*M0-M7*/ "CPU0_RC_ERROR","CPU1_RC_ERROR","","OC_DETECT_EN",
151 /*N0-N7*/ "","","","CPU_MSMI_LVT3","","BIOS_SPI_BMC_CTRL","","",
152 /*O0-O7*/ "","","","","","","","",
153 /*P0-P7*/ "BOARD_SKU_ID0","BOARD_SKU_ID1","BOARD_SKU_ID2",
156 /*Q0-Q7*/ "","","","","UARTSW_LSB","UARTSW_MSB",
158 /*R0-R7*/ "","","BMC_TCK_MUX_SEL","BMC_PRDY",
161 /*S0-S7*/ "THROTTLE","BMC_READY","","HSC_SMBUS_SWITCH_EN","",
163 /*T0-T7*/ "","","","","","","","",
164 /*U0-U7*/ "","","","","","BMC_FAULT","","",
165 /*V0-V7*/ "","","","FAST_PROCHOT_EN","","","","",
166 /*W0-W7*/ "","","","","","","","",
167 /*X0-X7*/ "","","","GLOBAL_RST_WARN",
172 /*Y0-Y7*/ "SIO_S3","SIO_S5","BMC_JTAG_SEL","SIO_ONCONTROL","",
174 /*Z0-Z7*/ "","SIO_POWER_GOOD","IRQ_PVDDQ_DEF_VRHOT_LVT3","",
176 /*AA0-AA7*/ "CPU1_SKTOCC_LVT3","IRQ_SML1_PMBUS_ALERT",
179 /*AB0-AB7*/ "IRQ_HSC_FAULT","OCP_MEZZA_PRES","","","","","","",
180 /*AC0-AC7*/ "","","","","","","","";
186 pinctrl-names = "default";
187 pinctrl-0 = <&pinctrl_rmii1_default>;
190 clock-names = "MACCLK", "RCLK";
191 use-ncsi;
206 i2c-switch@71 {
208 #address-cells = <1>;
209 #size-cells = <0>;
213 #address-cells = <1>;
214 #size-cells = <0>;
238 i2c-switch@73 {
240 #address-cells = <1>;
241 #size-cells = <0>;
245 #address-cells = <1>;
246 #size-cells = <0>;
251 #address-cells = <1>;
252 #size-cells = <0>;
257 #address-cells = <1>;
258 #size-cells = <0>;
263 #address-cells = <1>;
264 #size-cells = <0>;
273 #address-cells = <1>;
274 #size-cells = <0>;
298 i2c-switch@73 {
300 #address-cells = <1>;
301 #size-cells = <0>;
305 #address-cells = <1>;
306 #size-cells = <0>;
311 #address-cells = <1>;
312 #size-cells = <0>;
317 #address-cells = <1>;
318 #size-cells = <0>;
323 #address-cells = <1>;
324 #size-cells = <0>;
333 #address-cells = <1>;
334 #size-cells = <0>;
358 i2c-switch@73 {
360 #address-cells = <1>;
361 #size-cells = <0>;
365 #address-cells = <1>;
366 #size-cells = <0>;
371 #address-cells = <1>;
372 #size-cells = <0>;
377 #address-cells = <1>;
378 #size-cells = <0>;
383 #address-cells = <1>;
384 #size-cells = <0>;
393 #address-cells = <1>;
394 #size-cells = <0>;
397 i2c-switch@40 {
402 i2c-switch@41 {
407 i2c-switch@45 {
431 compatible = "ipmb-dev";
433 i2c-protocol;
440 regulator@48 {
444 regulator@4a {
448 regulator@50 {
452 regulator@52 {
456 regulator@58 {
460 regulator@5a {
464 regulator@68 {
468 regulator@70 {
472 regulator@72 {
517 compatible = "ipmb-dev";
519 i2c-protocol;
525 pinctrl-names = "default";
526 pinctrl-0 = <&pinctrl_pwm0_default &pinctrl_pwm1_default>;
529 aspeed,fan-tach-ch = /bits/ 8 <0x00>;
534 aspeed,fan-tach-ch = /bits/ 8 <0x02>;