Lines Matching +full:1 +full:d00000
59 nr-ports = <1>;
70 bm,pool-short = <1>;
106 #address-cells = <1>;
117 wan_white@1 {
177 #address-cells = <1>;
191 gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
219 pcie@1,0 {
226 /* Port 0, Lane 1 */
259 #address-cells = <1>;
260 #size-cells = <1>;
272 #address-cells = <1>;
277 #address-cells = <1>;
285 port@1 {
286 reg = <1>;
332 #address-cells = <1>;
333 #size-cells = <1>;
337 reg = <0x0000000 0x100000>; /* 1MB */
353 reg = <0x900000 0x100000>; /* 1MB */
363 partition@d00000 {