boot/dts/am437x-idk-evm.dts

104 		pinctrl-0 = <&gpio_keys_pins_default>;
106 		#size-cells = <0>;
117 		#clock-cells = <0>;
127 			gpios = <&tpic2810 0 GPIO_ACTIVE_HIGH>;
178 			AM4372_IOPAD(0x9b8, PIN_INPUT | MUX_MODE7)	/* cam0_field.gpio4_2 */
184 			AM4372_IOPAD(0x988, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_sda.i2c0_sda */
185 			AM4372_IOPAD(0x98c, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_scl.i2c0_scl */
191 			AM4372_IOPAD(0x988, PIN_INPUT_PULLDOWN | MUX_MODE7)
192 			AM4372_IOPAD(0x98c, PIN_INPUT_PULLDOWN | MUX_MODE7)
198 			AM4372_IOPAD(0x9e8, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE3) /* cam1_data1.i2c2_scl */
199 			AM4372_IOPAD(0x9ec, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE3) /* cam1_data0.i2c2_sda */
205 			AM4372_IOPAD(0x9e8, PIN_INPUT_PULLDOWN | MUX_MODE7)
206 			AM4372_IOPAD(0x9ec, PIN_INPUT_PULLDOWN | MUX_MODE7)
212 			AM4372_IOPAD(0x900, PIN_INPUT | MUX_MODE0) /* mmc0_clk.mmc0_clk */
213 			AM4372_IOPAD(0x904, PIN_INPUT | MUX_MODE0) /* mmc0_cmd.mmc0_cmd */
214 			AM4372_IOPAD(0x9f0, PIN_INPUT | MUX_MODE0) /* mmc0_dat3.mmc0_dat3 */
215 			AM4372_IOPAD(0x9f4, PIN_INPUT | MUX_MODE0) /* mmc0_dat2.mmc0_dat2 */
216 			AM4372_IOPAD(0x9f8, PIN_INPUT | MUX_MODE0) /* mmc0_dat1.mmc0_dat1 */
217 			AM4372_IOPAD(0x9fc, PIN_INPUT | MUX_MODE0) /* mmc0_dat0.mmc0_dat0 */
218 			AM4372_IOPAD(0x960, PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */
224 			AM4372_IOPAD(0x900, PIN_INPUT_PULLDOWN | MUX_MODE7)
225 			AM4372_IOPAD(0x904, PIN_INPUT_PULLDOWN | MUX_MODE7)
226 			AM4372_IOPAD(0x9f0, PIN_INPUT_PULLDOWN | MUX_MODE7)
227 			AM4372_IOPAD(0x9f4, PIN_INPUT_PULLDOWN | MUX_MODE7)
228 			AM4372_IOPAD(0x9f8, PIN_INPUT_PULLDOWN | MUX_MODE7)
229 			AM4372_IOPAD(0x9fc, PIN_INPUT_PULLDOWN | MUX_MODE7)
230 			AM4372_IOPAD(0x960, PIN_INPUT_PULLDOWN | MUX_MODE7)
236 			AM4372_IOPAD(0x908, PIN_INPUT | MUX_MODE2)	/* mii1_col.spi1_sclk */
237 			AM4372_IOPAD(0x910, PIN_INPUT | MUX_MODE2)	/* mii1_rx_er.spi1_d1 */
238 			AM4372_IOPAD(0x944, PIN_OUTPUT | MUX_MODE2)	/* rmii1_ref_clk.spi1_cs0 */
239 			AM4372_IOPAD(0x90c, PIN_OUTPUT | MUX_MODE7)	/* mii1_crs.gpio3_1 */
245 			AM4372_IOPAD(0x908, PIN_INPUT_PULLDOWN | MUX_MODE7)
246 			AM4372_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE7)
247 			AM4372_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE7)
248 			AM4372_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE7)
254 			AM4372_IOPAD(0x964, PIN_OUTPUT | MUX_MODE0) /* ecap0_in_pwm0_out.ecap0_in_pwm0_out */
260 			AM4372_IOPAD(0x92c, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txclk.rgmii1_tclk */
261 			AM4372_IOPAD(0x914, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txen.rgmii1_tctl */
262 			AM4372_IOPAD(0x928, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txd0.rgmii1_td0 */
263 			AM4372_IOPAD(0x924, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txd1.rgmii1_td1 */
264 			AM4372_IOPAD(0x920, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txd0.rgmii1_td2 */
265 			AM4372_IOPAD(0x91c, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txd1.rgmii1_td3 */
266 			AM4372_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rxclk.rmii1_rclk */
267 			AM4372_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rxdv.rgmii1_rctl */
268 			AM4372_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rxd0.rgmii1_rd0 */
269 			AM4372_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rxd1.rgmii1_rd1 */
270 			AM4372_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rxd0.rgmii1_rd2 */
271 			AM4372_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rxd1.rgmii1_rd3 */
277 			AM4372_IOPAD(0x92c, PIN_INPUT_PULLDOWN | MUX_MODE7)
278 			AM4372_IOPAD(0x914, PIN_INPUT_PULLDOWN | MUX_MODE7)
279 			AM4372_IOPAD(0x928, PIN_INPUT_PULLDOWN | MUX_MODE7)
280 			AM4372_IOPAD(0x924, PIN_INPUT_PULLDOWN | MUX_MODE7)
281 			AM4372_IOPAD(0x920, PIN_INPUT_PULLDOWN | MUX_MODE7)
282 			AM4372_IOPAD(0x91c, PIN_INPUT_PULLDOWN | MUX_MODE7)
283 			AM4372_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE7)
284 			AM4372_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE7)
285 			AM4372_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE7)
286 			AM4372_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE7)
287 			AM4372_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE7)
288 			AM4372_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE7)
295 			AM4372_IOPAD(0x948, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)	/* mdio_data.mdio_data */
296 			AM4372_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE0)			/* mdio_clk.mdio_clk */
303 			AM4372_IOPAD(0x948, PIN_INPUT_PULLDOWN | MUX_MODE7)
304 			AM4372_IOPAD(0x94c, PIN_INPUT_PULLDOWN | MUX_MODE7)
310 			AM4372_IOPAD(0x87c, PIN_OUTPUT_PULLUP | MUX_MODE3)	/* gpmc_csn0.qspi_csn */
311 			AM4372_IOPAD(0x888, PIN_OUTPUT | MUX_MODE2)		/* gpmc_csn3.qspi_clk */
312 			AM4372_IOPAD(0x890, PIN_INPUT_PULLUP | MUX_MODE3)	/* gpmc_advn_ale.qspi_d0 */
313 			AM4372_IOPAD(0x894, PIN_INPUT_PULLUP | MUX_MODE3)	/* gpmc_oen_ren.qspi_d1 */
314 			AM4372_IOPAD(0x898, PIN_INPUT_PULLUP | MUX_MODE3)	/* gpmc_wen.qspi_d2 */
315 			AM4372_IOPAD(0x89c, PIN_INPUT_PULLUP | MUX_MODE3)	/* gpmc_be0n_cle.qspi_d3 */
321 			AM4372_IOPAD(0x87c, PIN_INPUT_PULLDOWN | MUX_MODE7)
322 			AM4372_IOPAD(0x888, PIN_INPUT_PULLDOWN | MUX_MODE7)
323 			AM4372_IOPAD(0x890, PIN_INPUT_PULLDOWN | MUX_MODE7)
324 			AM4372_IOPAD(0x894, PIN_INPUT_PULLDOWN | MUX_MODE7)
325 			AM4372_IOPAD(0x898, PIN_INPUT_PULLDOWN | MUX_MODE7)
326 			AM4372_IOPAD(0x89c, PIN_INPUT_PULLDOWN | MUX_MODE7)
334 	pinctrl-0 = <&i2c0_pins_default>;
341 		reg = <0x50>;
346 		reg = <0x60>;
361 	pinctrl-0 = <&i2c2_pins_default>;
367 		reg = <0x60>;
376 	pinctrl-0 = <&spi1_pins_default>;
380 	sn65hvs882: sn65hvs882@0 {
387 		reg = <0>;
400 	pinctrl-0 = <&ecap0_pins_default>;
426 	pinctrl-0 = <&mmc1_pins_default>;
436 	pinctrl-0 = <&qspi_pins_default>;
440 	m25p80@0 {
443 		reg = <0>;
455 		partition@0 {
457 			reg = <0x00000000 0x000080000>;
461 			reg = <0x00080000 0x00080000>;
465 			reg = <0x00100000 0x00010000>;
469 			reg = <0x00110000 0x00010000>;
473 			reg = <0x00120000 0x00010000>;
477 			reg = <0x00130000 0x0800000>;
481 			reg = <0x00930000 0x36D0000>;
488 	pinctrl-0 = <&cpsw_default>;
495 	pinctrl-0 = <&davinci_mdio_default>;
498 	ethphy0: ethernet-phy@0 {
499 		reg = <0>;